I just wanted to make everyone aware that we're holding a tutorial again
at ISCA this year (Sunday 6/18), and that we are planning to release M5
version 2.0 in conjunction with the tutorial.
We have some exciting new features coming in v2.0, including:
- an all-new out-of-order CPU model (previewed by Kevin Lim at last
year's tutorial),
- an all-new inter-object protocol for memory-system objects,
- multiple ISA support, including basic implementations of MIPS and SPARC
Even if you came to last year's tutorial, you can come again to learn
about these new features.
Our tutorial page:
http://m5.eecs.umich.edu/isca_06.html
ISCA web page (registration, schedule, etc.):
http://www.ece.neu.edu/conf/isca2006
Hope to see you there!
Steve
I just wanted to make everyone aware that we're holding a tutorial again
at ISCA this year (Sunday 6/18), and that we are planning to release M5
version 2.0 in conjunction with the tutorial.
We have some exciting new features coming in v2.0, including:
- an all-new out-of-order CPU model (previewed by Kevin Lim at last
year's tutorial),
- an all-new inter-object protocol for memory-system objects,
- multiple ISA support, including basic implementations of MIPS and SPARC
Even if you came to last year's tutorial, you can come again to learn
about these new features.
Our tutorial page:
http://m5.eecs.umich.edu/isca_06.html
ISCA web page (registration, schedule, etc.):
http://www.ece.neu.edu/conf/isca2006
Hope to see you there!
Steve