Hi All, I would like to know whether there is any ongoing work to implement 2 level TLB in X86 FS. I understand that ARM has 2 level TLB implementation. I was wondering if there is an ongoing development activity for 2 level TLB in X86, I can use that for the time being Thanks Arun KP

Hi Arun, There's no mainline changes which implement a two level TLB in x86. This would be a welcome contribution, though! Cheers, Jason On Wed, Aug 31, 2022 at 12:14 AM Arun Kavumkal <arunkp.online@gmail.com> wrote: > Hi All, > I would like to know whether there is any ongoing work to implement 2 > level TLB in X86 FS. I understand that ARM has 2 level TLB implementation. > I was wondering if there is an ongoing development activity for 2 level > TLB in X86, I can use that for the time being > > Thanks > Arun KP > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-leave@gem5.org >