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Making memory address ranges visible as NUMA nodes to the OS

BP
Ben Perach
Thu, Feb 27, 2020 4:34 PM

Hi all,

I am trying to create a multicore system with two memory types, one is a
regular DRAM and the other memory has a longer latency. The memories are
located on different memory channels but have the same interconnect
latency, the only latency difference is between the memory controller and
the memory itself due to memory technology. The address range of each
memory is continues and not interleaved. (This is something like a
multicore system with DRAM and persistent memory).

In order to be able to assign pages specifically to each memory, I want the
OS to recognize the two memories as two different NUMA nodes.
How can I make gem5 fs to report to the OS  that the two memory address
ranges belong to different NUMA nodes?
Can I add some component to the configuration script to make this happen?
Do I need to change the BIOS somehow?

(I have tried using the numa=fake tool on Linux, but it did not create new
fake nodes.)

Thank you very much,
Ben Perach

Hi all, I am trying to create a multicore system with two memory types, one is a regular DRAM and the other memory has a longer latency. The memories are located on different memory channels but have the same interconnect latency, the only latency difference is between the memory controller and the memory itself due to memory technology. The address range of each memory is continues and not interleaved. (This is something like a multicore system with DRAM and persistent memory). In order to be able to assign pages specifically to each memory, I want the OS to recognize the two memories as two different NUMA nodes. How can I make gem5 fs to report to the OS that the two memory address ranges belong to different NUMA nodes? Can I add some component to the configuration script to make this happen? Do I need to change the BIOS somehow? (I have tried using the numa=fake tool on Linux, but it did not create new fake nodes.) Thank you very much, Ben Perach
JL
Jason Lowe-Power
Fri, Feb 28, 2020 4:37 PM

Hi Ben,

This is a great question! To be honest, I don't know the answer. I think it
will have something to do with the E820 entries in the config file, but I
don't know exactly how to do it. See this issue about trying to create a
more realistic memory layout for Linux:
https://gem5.atlassian.net/browse/GEM5-11.

Let us know if you figure anything out! Feel free to comment on that issue
or the sub tasks.

Cheers,
Jason

On Thu, Feb 27, 2020 at 8:35 AM Ben Perach <bperach(a)gmail.com> wrote:

Hi all,

I am trying to create a multicore system with two memory types, one is a
regular DRAM and the other memory has a longer latency. The memories are
located on different memory channels but have the same interconnect
latency, the only latency difference is between the memory controller and
the memory itself due to memory technology. The address range of each
memory is continues and not interleaved. (This is something like a
multicore system with DRAM and persistent memory).

In order to be able to assign pages specifically to each memory, I want
the OS to recognize the two memories as two different NUMA nodes.
How can I make gem5 fs to report to the OS  that the two memory address
ranges belong to different NUMA nodes?
Can I add some component to the configuration script to make this happen?
Do I need to change the BIOS somehow?

(I have tried using the numa=fake tool on Linux, but it did not create new
fake nodes.)

Thank you very much,
Ben Perach


gem5-users mailing list
gem5-users(a)gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Hi Ben, This is a great question! To be honest, I don't know the answer. I think it will have something to do with the E820 entries in the config file, but I don't know exactly how to do it. See this issue about trying to create a more realistic memory layout for Linux: https://gem5.atlassian.net/browse/GEM5-11. Let us know if you figure anything out! Feel free to comment on that issue or the sub tasks. Cheers, Jason On Thu, Feb 27, 2020 at 8:35 AM Ben Perach <bperach(a)gmail.com> wrote: > Hi all, > > I am trying to create a multicore system with two memory types, one is a > regular DRAM and the other memory has a longer latency. The memories are > located on different memory channels but have the same interconnect > latency, the only latency difference is between the memory controller and > the memory itself due to memory technology. The address range of each > memory is continues and not interleaved. (This is something like a > multicore system with DRAM and persistent memory). > > In order to be able to assign pages specifically to each memory, I want > the OS to recognize the two memories as two different NUMA nodes. > How can I make gem5 fs to report to the OS that the two memory address > ranges belong to different NUMA nodes? > Can I add some component to the configuration script to make this happen? > Do I need to change the BIOS somehow? > > (I have tried using the numa=fake tool on Linux, but it did not create new > fake nodes.) > > Thank you very much, > Ben Perach > _______________________________________________ > gem5-users mailing list > gem5-users(a)gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
DM
Dr. Matthias Jung
Fri, Feb 28, 2020 6:42 PM

Hi Ben,

We have a similar setup, I could bring you in contact with some people here.

Greetings,
Matthias

--

Dr.-Ing. Matthias Jung
Expert „Virtual Hardware Engineering“
Embedded Systems Engineering
Fraunhofer IESE
Fraunhofer-Platz 1 | 67663 Kaiserslautern | Germany
Phone: +49 631 / 6800 - 2279 | Fax: +49 631 / 6800 - 9 2279
Mobile: +49 151 / 15672508
www.iese.fraunhofer.de
Email: Matthias.Jung(a)iese.fraunhofer.de

Am 28.02.2020 um 17:38 schrieb Jason Lowe-Power <jason(a)lowepower.com>:


Hi Ben,

This is a great question! To be honest, I don't know the answer. I think it will have something to do with the E820 entries in the config file, but I don't know exactly how to do it. See this issue about trying to create a more realistic memory layout for Linux: https://gem5.atlassian.net/browse/GEM5-11.

Let us know if you figure anything out! Feel free to comment on that issue or the sub tasks.

Cheers,
Jason

On Thu, Feb 27, 2020 at 8:35 AM Ben Perach <bperach(a)gmail.com> wrote:
Hi all,

I am trying to create a multicore system with two memory types, one is a regular DRAM and the other memory has a longer latency. The memories are located on different memory channels but have the same interconnect latency, the only latency difference is between the memory controller and the memory itself due to memory technology. The address range of each memory is continues and not interleaved. (This is something like a multicore system with DRAM and persistent memory).

In order to be able to assign pages specifically to each memory, I want the OS to recognize the two memories as two different NUMA nodes.
How can I make gem5 fs to report to the OS  that the two memory address ranges belong to different NUMA nodes?
Can I add some component to the configuration script to make this happen?
Do I need to change the BIOS somehow?

(I have tried using the numa=fake tool on Linux, but it did not create new fake nodes.)

Thank you very much,
Ben Perach


gem5-users mailing list
gem5-users(a)gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users


gem5-users mailing list
gem5-users(a)gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Hi Ben, We have a similar setup, I could bring you in contact with some people here. Greetings, Matthias -- Dr.-Ing. Matthias Jung Expert „Virtual Hardware Engineering“ Embedded Systems Engineering Fraunhofer IESE Fraunhofer-Platz 1 | 67663 Kaiserslautern | Germany Phone: +49 631 / 6800 - 2279 | Fax: +49 631 / 6800 - 9 2279 Mobile: +49 151 / 15672508 www.iese.fraunhofer.de Email: Matthias.Jung(a)iese.fraunhofer.de > Am 28.02.2020 um 17:38 schrieb Jason Lowe-Power <jason(a)lowepower.com>: > >  > Hi Ben, > > This is a great question! To be honest, I don't know the answer. I think it will have something to do with the E820 entries in the config file, but I don't know exactly how to do it. See this issue about trying to create a more realistic memory layout for Linux: https://gem5.atlassian.net/browse/GEM5-11. > > Let us know if you figure anything out! Feel free to comment on that issue or the sub tasks. > > Cheers, > Jason > >> On Thu, Feb 27, 2020 at 8:35 AM Ben Perach <bperach(a)gmail.com> wrote: >> Hi all, >> >> I am trying to create a multicore system with two memory types, one is a regular DRAM and the other memory has a longer latency. The memories are located on different memory channels but have the same interconnect latency, the only latency difference is between the memory controller and the memory itself due to memory technology. The address range of each memory is continues and not interleaved. (This is something like a multicore system with DRAM and persistent memory). >> >> In order to be able to assign pages specifically to each memory, I want the OS to recognize the two memories as two different NUMA nodes. >> How can I make gem5 fs to report to the OS that the two memory address ranges belong to different NUMA nodes? >> Can I add some component to the configuration script to make this happen? >> Do I need to change the BIOS somehow? >> >> (I have tried using the numa=fake tool on Linux, but it did not create new fake nodes.) >> >> Thank you very much, >> Ben Perach >> _______________________________________________ >> gem5-users mailing list >> gem5-users(a)gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > _______________________________________________ > gem5-users mailing list > gem5-users(a)gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
JL
Jason Lowe-Power
Fri, Feb 28, 2020 7:07 PM

Hey Matthias,

It would be great if we could get an example config checked into gem5! This
is a common thing that many of us are working on :).

Cheers,
Jason

On Fri, Feb 28, 2020 at 10:44 AM Dr. Matthias Jung <jungma(a)eit.uni-kl.de>
wrote:

Hi Ben,

We have a similar setup, I could bring you in contact with some people
here.

Greetings,
Matthias

--

Dr.-Ing. Matthias Jung
Expert „Virtual Hardware Engineering“
Embedded Systems Engineering
Fraunhofer IESE
Fraunhofer-Platz 1 | 67663 Kaiserslautern | Germany
Phone: +49 631 / 6800 - 2279 <+49%20631%20/%206800%20-%202279> | Fax: +49
631 / 6800 - 9 2279 <+49%20631%20/%206800%20-%209%202279>
Mobile: +49 151 / 15672508
www.iese.fraunhofer.de
Email: Matthias.Jung(a)iese.fraunhofer.de

Am 28.02.2020 um 17:38 schrieb Jason Lowe-Power <jason(a)lowepower.com>:


Hi Ben,

This is a great question! To be honest, I don't know the answer. I think
it will have something to do with the E820 entries in the config file, but
I don't know exactly how to do it. See this issue about trying to create a
more realistic memory layout for Linux:
https://gem5.atlassian.net/browse/GEM5-11.

Let us know if you figure anything out! Feel free to comment on that issue
or the sub tasks.

Cheers,
Jason

On Thu, Feb 27, 2020 at 8:35 AM Ben Perach <bperach(a)gmail.com> wrote:

Hi all,

I am trying to create a multicore system with two memory types, one is a
regular DRAM and the other memory has a longer latency. The memories are
located on different memory channels but have the same interconnect
latency, the only latency difference is between the memory controller and
the memory itself due to memory technology. The address range of each
memory is continues and not interleaved. (This is something like a
multicore system with DRAM and persistent memory).

In order to be able to assign pages specifically to each memory, I want
the OS to recognize the two memories as two different NUMA nodes.
How can I make gem5 fs to report to the OS  that the two memory address
ranges belong to different NUMA nodes?
Can I add some component to the configuration script to make this happen?
Do I need to change the BIOS somehow?

(I have tried using the numa=fake tool on Linux, but it did not create
new fake nodes.)

Thank you very much,
Ben Perach


gem5-users mailing list
gem5-users(a)gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users


gem5-users mailing list
gem5-users(a)gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users


gem5-users mailing list
gem5-users(a)gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Hey Matthias, It would be great if we could get an example config checked into gem5! This is a common thing that many of us are working on :). Cheers, Jason On Fri, Feb 28, 2020 at 10:44 AM Dr. Matthias Jung <jungma(a)eit.uni-kl.de> wrote: > Hi Ben, > > We have a similar setup, I could bring you in contact with some people > here. > > Greetings, > Matthias > > -- > > Dr.-Ing. Matthias Jung > Expert „Virtual Hardware Engineering“ > Embedded Systems Engineering > Fraunhofer IESE > Fraunhofer-Platz 1 | 67663 Kaiserslautern | Germany > Phone: +49 631 / 6800 - 2279 <+49%20631%20/%206800%20-%202279> | Fax: +49 > 631 / 6800 - 9 2279 <+49%20631%20/%206800%20-%209%202279> > Mobile: +49 151 / 15672508 > www.iese.fraunhofer.de > Email: Matthias.Jung(a)iese.fraunhofer.de > > Am 28.02.2020 um 17:38 schrieb Jason Lowe-Power <jason(a)lowepower.com>: > >  > Hi Ben, > > This is a great question! To be honest, I don't know the answer. I think > it will have something to do with the E820 entries in the config file, but > I don't know exactly how to do it. See this issue about trying to create a > more realistic memory layout for Linux: > https://gem5.atlassian.net/browse/GEM5-11. > > Let us know if you figure anything out! Feel free to comment on that issue > or the sub tasks. > > Cheers, > Jason > > On Thu, Feb 27, 2020 at 8:35 AM Ben Perach <bperach(a)gmail.com> wrote: > >> Hi all, >> >> I am trying to create a multicore system with two memory types, one is a >> regular DRAM and the other memory has a longer latency. The memories are >> located on different memory channels but have the same interconnect >> latency, the only latency difference is between the memory controller and >> the memory itself due to memory technology. The address range of each >> memory is continues and not interleaved. (This is something like a >> multicore system with DRAM and persistent memory). >> >> In order to be able to assign pages specifically to each memory, I want >> the OS to recognize the two memories as two different NUMA nodes. >> How can I make gem5 fs to report to the OS that the two memory address >> ranges belong to different NUMA nodes? >> Can I add some component to the configuration script to make this happen? >> Do I need to change the BIOS somehow? >> >> (I have tried using the numa=fake tool on Linux, but it did not create >> new fake nodes.) >> >> Thank you very much, >> Ben Perach >> _______________________________________________ >> gem5-users mailing list >> gem5-users(a)gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ > gem5-users mailing list > gem5-users(a)gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ > gem5-users mailing list > gem5-users(a)gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users