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[S] Change in gem5/gem5[develop]: arch-arm: Remove unnecessary self hosted debug initialization

GT
Giacomo Travaglini (Gerrit)
Fri, Jun 24, 2022 2:03 PM

Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/60730 )

Change subject: arch-arm: Remove unnecessary self hosted debug
initialization
......................................................................

arch-arm: Remove unnecessary self hosted debug initialization

The init method is already called by in the ISA::init, before
simulation starts, so there is no need to check for it
when a watchpoint/breakpoint is set by guest software

Change-Id: I776a1824799a7f4a351eb7d3c7002a11726f9d6a
Signed-off-by: Giacomo Travaglini giacomo.travaglini@arm.com
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60730
Maintainer: Andreas Sandberg andreas.sandberg@arm.com
Reviewed-by: Richard Cooper richard.cooper@arm.com
Tested-by: kokoro noreply+kokoro@google.com
Reviewed-by: Andreas Sandberg andreas.sandberg@arm.com

M src/arch/arm/self_debug.cc
M src/arch/arm/self_debug.hh
2 files changed, 20 insertions(+), 14 deletions(-)

Approvals:
kokoro: Regressions pass
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
Richard Cooper: Looks good to me, approved

diff --git a/src/arch/arm/self_debug.cc b/src/arch/arm/self_debug.cc
index 86da693..e327f58 100644
--- a/src/arch/arm/self_debug.cc
+++ b/src/arch/arm/self_debug.cc
@@ -82,8 +82,6 @@

  to32 = targetAArch32(tc);
  • init(tc);
  • if (!isDebugEnabled(tc))
        return NoFault;
    

@@ -127,8 +125,6 @@
{
setAArch32(tc);
to32 = targetAArch32(tc);

  • if (!initialized)
  •    init(tc);
    if (!isDebugEnabled(tc) || !mde)
        return NoFault;
    

@@ -330,8 +326,6 @@
void
SelfDebug::init(ThreadContext *tc)
{

  • if (initialized)
  •    return;
    CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
    aarch32 = cpsr.width == 1;
    

@@ -362,8 +356,6 @@
arWatchPoints.push_back(wtp);
}

  • initialized = true;
  • RegVal oslar_el1 = tc->readMiscReg(MISCREG_OSLAR_EL1);
    updateOSLock(oslar_el1);
    // Initialize preloaded control booleans
    

@@ -721,8 +713,6 @@

  setAArch32(tc);
  to32 = targetAArch32(tc);
  • if (!initialized)
  •    init(tc);
    if (!isDebugEnabled(tc) || !mde || !aarch32)
        return NoFault;
    

diff --git a/src/arch/arm/self_debug.hh b/src/arch/arm/self_debug.hh
index c73782e..5ced11c 100644
--- a/src/arch/arm/self_debug.hh
+++ b/src/arch/arm/self_debug.hh
@@ -282,7 +282,6 @@
SoftwareStep * softStep;
VectorCatch * vcExcpt;

  • bool initialized;
    bool enableTdeTge; // MDCR_EL2.TDE || HCR_EL2.TGE

    bool mde; // MDSCR_EL1.MDE, DBGDSCRext.MDBGen
    @@ -295,7 +294,7 @@

public:
  SelfDebug()
  •  : initialized(false), enableTdeTge(false),
    
  •  : enableTdeTge(false),
        mde(false), sdd(false), kde(false), oslk(false)
    {
        softStep = new SoftwareStep(this);
    

@@ -449,8 +448,6 @@
VectorCatch*
getVectorCatch(ThreadContext *tc)
{

  •    if (!initialized)
    
  •        init(tc);
        return vcExcpt;
    }
    

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I776a1824799a7f4a351eb7d3c7002a11726f9d6a
Gerrit-Change-Number: 60730
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini giacomo.travaglini@arm.com
Gerrit-Reviewer: Andreas Sandberg andreas.sandberg@arm.com
Gerrit-Reviewer: Giacomo Travaglini giacomo.travaglini@arm.com
Gerrit-Reviewer: Richard Cooper richard.cooper@arm.com
Gerrit-Reviewer: kokoro noreply+kokoro@google.com
Gerrit-MessageType: merged

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/60730 ) Change subject: arch-arm: Remove unnecessary self hosted debug initialization ...................................................................... arch-arm: Remove unnecessary self hosted debug initialization The init method is already called by in the ISA::init, before simulation starts, so there is no need to check for it when a watchpoint/breakpoint is set by guest software Change-Id: I776a1824799a7f4a351eb7d3c7002a11726f9d6a Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60730 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Richard Cooper <richard.cooper@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> --- M src/arch/arm/self_debug.cc M src/arch/arm/self_debug.hh 2 files changed, 20 insertions(+), 14 deletions(-) Approvals: kokoro: Regressions pass Andreas Sandberg: Looks good to me, approved; Looks good to me, approved Richard Cooper: Looks good to me, approved diff --git a/src/arch/arm/self_debug.cc b/src/arch/arm/self_debug.cc index 86da693..e327f58 100644 --- a/src/arch/arm/self_debug.cc +++ b/src/arch/arm/self_debug.cc @@ -82,8 +82,6 @@ to32 = targetAArch32(tc); - init(tc); - if (!isDebugEnabled(tc)) return NoFault; @@ -127,8 +125,6 @@ { setAArch32(tc); to32 = targetAArch32(tc); - if (!initialized) - init(tc); if (!isDebugEnabled(tc) || !mde) return NoFault; @@ -330,8 +326,6 @@ void SelfDebug::init(ThreadContext *tc) { - if (initialized) - return; CPSR cpsr = tc->readMiscReg(MISCREG_CPSR); aarch32 = cpsr.width == 1; @@ -362,8 +356,6 @@ arWatchPoints.push_back(wtp); } - initialized = true; - RegVal oslar_el1 = tc->readMiscReg(MISCREG_OSLAR_EL1); updateOSLock(oslar_el1); // Initialize preloaded control booleans @@ -721,8 +713,6 @@ setAArch32(tc); to32 = targetAArch32(tc); - if (!initialized) - init(tc); if (!isDebugEnabled(tc) || !mde || !aarch32) return NoFault; diff --git a/src/arch/arm/self_debug.hh b/src/arch/arm/self_debug.hh index c73782e..5ced11c 100644 --- a/src/arch/arm/self_debug.hh +++ b/src/arch/arm/self_debug.hh @@ -282,7 +282,6 @@ SoftwareStep * softStep; VectorCatch * vcExcpt; - bool initialized; bool enableTdeTge; // MDCR_EL2.TDE || HCR_EL2.TGE bool mde; // MDSCR_EL1.MDE, DBGDSCRext.MDBGen @@ -295,7 +294,7 @@ public: SelfDebug() - : initialized(false), enableTdeTge(false), + : enableTdeTge(false), mde(false), sdd(false), kde(false), oslk(false) { softStep = new SoftwareStep(this); @@ -449,8 +448,6 @@ VectorCatch* getVectorCatch(ThreadContext *tc) { - if (!initialized) - init(tc); return vcExcpt; } -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/60730 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I776a1824799a7f4a351eb7d3c7002a11726f9d6a Gerrit-Change-Number: 60730 Gerrit-PatchSet: 2 Gerrit-Owner: Giacomo Travaglini <giacomo.travaglini@arm.com> Gerrit-Reviewer: Andreas Sandberg <andreas.sandberg@arm.com> Gerrit-Reviewer: Giacomo Travaglini <giacomo.travaglini@arm.com> Gerrit-Reviewer: Richard Cooper <richard.cooper@arm.com> Gerrit-Reviewer: kokoro <noreply+kokoro@google.com> Gerrit-MessageType: merged