Hello gem5-users, Is it possible to use Garnet to model chip-level components which by definition have no caches and therefore no coherence protocol (or routers) *but* still rely on credit-based flow control. Garnet appears to have been built for modelling distributed systems containing host CPUs, caches, routers and coherence protocols. I would like to know whether there is a way to work with Garnet without the notion of caches. Can these components be disabled or would I have to build the model "manually", sans Garnet? Regards, - Olumide

Hi Olumide, The "Garnet standalone" protocol is meant to be used when you want to use garnet without a coherence protocol. Hopefully that works for your use case. Cheers, Jason On Mon, Nov 4, 2024 at 9:55 AM Olumide via gem5-users <gem5-users@gem5.org> wrote: > Hello gem5-users, > > Is it possible to use Garnet to model chip-level components which by > definition have no caches and therefore no coherence protocol (or > routers) *but* still rely on credit-based flow control. > > Garnet appears to have been built for modelling distributed systems > containing host CPUs, caches, routers and coherence protocols. I would > like to know whether there is a way to work with Garnet without the > notion of caches. Can these components be disabled or would I have to > build the model "manually", sans Garnet? > > Regards, > > - Olumide > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-leave@gem5.org >