RV32 Dhrystone Benchmark Error: Syscall 403 not found
Hello! My query consists of two parts. The first one being "How do I build
gem5.opt for a RISC-V 32 simulation". The build I have done now is
following a stack overflow solution wherein I made the following
replacements:
RiscvISA.py 95: riscv_type = Param.RiscvType("RV32","RV32 or RV64") #
RV64 --> RV32RiscvISA.py 103: elen =
Param.RiscvVectorElementLength(32, ....... ) # 64 --> 32
Following this replacement and build ( correct me if the build process was
wrong ), I had cross-compiled a dhrystone benchmark (src: Fleker's
Dhrystone benchmark
https://github.com/Fleker/memristor-research/blob/master/experiments/dhrystone.c)
using riscv32-unknown-elf-gcc 13.1.0 as follows:
riscv32-unknown-elf-gcc -march=rv32gc -mabi=ilp32d -static -o
dhrystone_rv32 dhrystone.c -lm -g
The simple-riscv.py config file in the learning_gem/part1 directory was
updated with the new binary's location and was simulated. The simulation
abruptly stops with a "fatal: Syscall 403 out of range" error
[image: Screenshot from 2024-07-06 11-14-14]
https://private-user-images.githubusercontent.com/96340698/346254200-23e4a5b8-4a89-424a-bdb2-f8a9e3975ece.png?jwt=eyJhbGciOiJIUzI1NiIsInR5cCI6IkpXVCJ9.eyJpc3MiOiJnaXRodWIuY29tIiwiYXVkIjoicmF3LmdpdGh1YnVzZXJjb250ZW50LmNvbSIsImtleSI6ImtleTUiLCJleHAiOjE3MjAyNDcxMDMsIm5iZiI6MTcyMDI0NjgwMywicGF0aCI6Ii85NjM0MDY5OC8zNDYyNTQyMDAtMjNlNGE1YjgtNGE4OS00MjRhLWJkYjItZjhhOWUzOTc1ZWNlLnBuZz9YLUFtei1BbGdvcml0aG09QVdTNC1ITUFDLVNIQTI1NiZYLUFtei1DcmVkZW50aWFsPUFLSUFWQ09EWUxTQTUzUFFLNFpBJTJGMjAyNDA3MDYlMkZ1cy1lYXN0LTElMkZzMyUyRmF3czRfcmVxdWVzdCZYLUFtei1EYXRlPTIwMjQwNzA2VDA2MjAwM1omWC1BbXotRXhwaXJlcz0zMDAmWC1BbXotU2lnbmF0dXJlPTNjOGQyMDcyZmY4ZjlmMWIxNzUxYWVlNTFmMmE5YTA1MTM3OTYxOTZkOTFhMGIyZWQ3YjUwMTFlMGUwYjc0YTUmWC1BbXotU2lnbmVkSGVhZGVycz1ob3N0JmFjdG9yX2lkPTAma2V5X2lkPTAmcmVwb19pZD0wIn0.-dM3bAaP532J06dL68uiWST7mdwJEFjLE90rjwiERBM
An observation I made was that the config file was setting up an SEWorkload
which led me to look into the se_workload.cc file which had a
SyscallDescTable for SEWorkload::SyscallABI32 containing many ID's and
their respective command. The ID 403 was not present in this Table as well:
My objective is to run an RV32 simulation for the dhrystone benchmark.
Please correct me on the build method if its incorrect and also information
on the syscall error. Any help on this would be very helpful! Thank you in
advance!
Hi,
It looks like the syscall 403 for rv32 has not been implemented in gem5
yet. I believe it is the clock_gettime64 syscall returning the time in
64-bit integer [1]. It looks like this syscall will be preferred over the
32-bit version moving forward.
I think it should be straightforward to implement this syscall as it has
been implemented for other ISAs [2]. It'll be great if you could make a
patch for this!
[1]
https://patchwork.kernel.org/project/qemu-devel/patch/5fa31f8938fb16e6d07d3ec10e6ddb7a4e274f79.1583518447.git.alistair.francis@wdc.com/
[2]
https://github.com/search?q=repo%3Agem5%2Fgem5%20clock_gettimeFunc&type=code
Regards,
Hoa Nguyen
On Fri, Jul 5, 2024, 23:21 S J Satish Kumar via gem5-users <
gem5-users@gem5.org> wrote:
Hello! My query consists of two parts. The first one being "How do I build
gem5.opt for a RISC-V 32 simulation". The build I have done now is
following a stack overflow solution wherein I made the following
replacements:
RiscvISA.py 95: riscv_type = Param.RiscvType("RV32","RV32 or RV64") # RV64 --> RV32RiscvISA.py 103: elen = Param.RiscvVectorElementLength(32, ....... ) # 64 --> 32
Following this replacement and build ( correct me if the build process was
wrong ), I had cross-compiled a dhrystone benchmark (src: Fleker's
Dhrystone benchmark
https://github.com/Fleker/memristor-research/blob/master/experiments/dhrystone.c)
using riscv32-unknown-elf-gcc 13.1.0 as follows:
riscv32-unknown-elf-gcc -march=rv32gc -mabi=ilp32d -static -o
dhrystone_rv32 dhrystone.c -lm -g
The simple-riscv.py config file in the learning_gem/part1 directory was
updated with the new binary's location and was simulated. The simulation
abruptly stops with a "fatal: Syscall 403 out of range" error
[image: Screenshot from 2024-07-06 11-14-14]
https://private-user-images.githubusercontent.com/96340698/346254200-23e4a5b8-4a89-424a-bdb2-f8a9e3975ece.png?jwt=eyJhbGciOiJIUzI1NiIsInR5cCI6IkpXVCJ9.eyJpc3MiOiJnaXRodWIuY29tIiwiYXVkIjoicmF3LmdpdGh1YnVzZXJjb250ZW50LmNvbSIsImtleSI6ImtleTUiLCJleHAiOjE3MjAyNDcxMDMsIm5iZiI6MTcyMDI0NjgwMywicGF0aCI6Ii85NjM0MDY5OC8zNDYyNTQyMDAtMjNlNGE1YjgtNGE4OS00MjRhLWJkYjItZjhhOWUzOTc1ZWNlLnBuZz9YLUFtei1BbGdvcml0aG09QVdTNC1ITUFDLVNIQTI1NiZYLUFtei1DcmVkZW50aWFsPUFLSUFWQ09EWUxTQTUzUFFLNFpBJTJGMjAyNDA3MDYlMkZ1cy1lYXN0LTElMkZzMyUyRmF3czRfcmVxdWVzdCZYLUFtei1EYXRlPTIwMjQwNzA2VDA2MjAwM1omWC1BbXotRXhwaXJlcz0zMDAmWC1BbXotU2lnbmF0dXJlPTNjOGQyMDcyZmY4ZjlmMWIxNzUxYWVlNTFmMmE5YTA1MTM3OTYxOTZkOTFhMGIyZWQ3YjUwMTFlMGUwYjc0YTUmWC1BbXotU2lnbmVkSGVhZGVycz1ob3N0JmFjdG9yX2lkPTAma2V5X2lkPTAmcmVwb19pZD0wIn0.-dM3bAaP532J06dL68uiWST7mdwJEFjLE90rjwiERBM
An observation I made was that the config file was setting up an
SEWorkload which led me to look into the se_workload.cc file which had a
SyscallDescTable for SEWorkload::SyscallABI32 containing many ID's and
their respective command. The ID 403 was not present in this Table as well:
My objective is to run an RV32 simulation for the dhrystone benchmark.
Please correct me on the build method if its incorrect and also information
on the syscall error. Any help on this would be very helpful! Thank you in
advance!
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