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[L] Change in gem5/gem5[develop]: arch-arm,tests: added arm-linux-boot tests for the ArmBoard

BB
Bobby Bruce (Gerrit)
Fri, Sep 23, 2022 5:16 PM

Bobby Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/62194?usp=email )

Change subject: arch-arm,tests: added arm-linux-boot tests for the ArmBoard
......................................................................

arch-arm,tests: added arm-linux-boot tests for the ArmBoard

This change adds ARM boot tests for the ArmBoard. The tests are
similar to existing boot tests which supports both m5 exit
instructions and a max-tick input format.

Change-Id: I9cb78424cf236e9092b4d4d34b68b1589b50ef37
Signed-off-by: Kaustav Goswami kggoswami@ucdavis.edu
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62194
Tested-by: kokoro noreply+kokoro@google.com
Reviewed-by: Bobby Bruce bbruce@ucdavis.edu
Maintainer: Bobby Bruce bbruce@ucdavis.edu

A tests/gem5/arm-boot-tests/test_linux_boot.py
A tests/gem5/configs/arm_boot_exit_run.py
2 files changed, 374 insertions(+), 0 deletions(-)

Approvals:
Bobby Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass

diff --git a/tests/gem5/arm-boot-tests/test_linux_boot.py
b/tests/gem5/arm-boot-tests/test_linux_boot.py
new file mode 100644
index 0000000..13a74a3
--- /dev/null
+++ b/tests/gem5/arm-boot-tests/test_linux_boot.py
@@ -0,0 +1,166 @@
+# Copyright (c) 2022 The Regents of the University of California
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+import re
+
+from typing import Optional
+
+from testlib import *
+
+if config.bin_path:

  • resource_path = config.bin_path
    +else:
  • resource_path = joinpath(absdirpath(file), "..", "resources")

+def test_boot(

  • cpu: str,
  • num_cpus: int,
  • cache_type: str,
  • memory_class: str,
  • length: str,
  • to_tick: Optional[int] = None,
    +):
  • name = f"{cpu}-cpu_{num_cpus}-cores_{cache_type}{memory_class}
    +arm-boot-test"
  • verifiers = []
  • config_args = [
  •    "--cpu",
    
  •    cpu,
    
  •    "--num-cpus",
    
  •    str(num_cpus),
    
  •    "--mem-system",
    
  •    cache_type,
    
  •    "--dram-class",
    
  •    memory_class,
    
  •    "--resource-directory",
    
  •    resource_path,
    
  • ]
  • if to_tick:
  •    name += "_to-tick"
    
  •    exit_regex = re.compile(
    
  •        "Exiting @ tick {} because simulate\(\) limit reached".format(
    
  •            str(to_tick)
    
  •        )
    
  •    )
    
  •    verifiers.append(verifier.MatchRegex(exit_regex))
    
  •    config_args += ["--tick-exit", str(to_tick)]
    
  • else:
  •    name += "_m5-exit"
    
  • gem5_verify_config(
  •    name=name,
    
  •    verifiers=verifiers,
    
  •    fixtures=(),
    
  •    config=joinpath(
    
  •        config.base_dir,
    
  •        "tests",
    
  •        "gem5",
    
  •        "configs",
    
  •        "arm_boot_exit_run.py",
    
  •    ),
    
  •    config_args=config_args,
    
  •    valid_isas=(constants.all_compiled_tag,),
    
  •    valid_hosts=constants.supported_hosts,
    
  •    length=length,
    
  • )

+#### The long (pre-submit/Kokoro) tests ####
+
+test_boot(

  • cpu="atomic",
  • num_cpus=1,
  • cache_type="classic",
  • memory_class="SingleChannelDDR3_1600",
  • length=constants.quick_tag,
  • to_tick=10000000000,
    +)

+test_boot(

  • cpu="timing",
  • num_cpus=1,
  • cache_type="classic",
  • memory_class="SingleChannelDDR3_2133",
  • length=constants.quick_tag,
  • to_tick=10000000000,
    +)

+test_boot(

  • cpu="o3",
  • num_cpus=1,
  • cache_type="classic",
  • memory_class="DualChannelDDR3_1600",
  • length=constants.quick_tag,
  • to_tick=10000000000,
    +)

+test_boot(

  • cpu="timing",
  • num_cpus=4,
  • cache_type="classic",
  • memory_class="DualChannelDDR3_2133",
  • length=constants.quick_tag,
  • to_tick=10000000000,
    +)

+#### The long (nightly) tests ####
+
+test_boot(

  • cpu="atomic",
  • num_cpus=1,
  • cache_type="classic",
  • memory_class="SingleChannelDDR3_1600",
  • length=constants.long_tag,
    +)

+test_boot(

  • cpu="timing",
  • num_cpus=1,
  • cache_type="classic",
  • memory_class="SingleChannelDDR3_2133",
  • length=constants.long_tag,
    +)

+test_boot(

  • cpu="o3",
  • num_cpus=1,
  • cache_type="classic",
  • memory_class="DualChannelDDR3_1600",
  • length=constants.long_tag,
    +)

+test_boot(

  • cpu="timing",
  • num_cpus=4,
  • cache_type="classic",
  • memory_class="HBM2Stack",
  • length=constants.long_tag,
    +)
    diff --git a/tests/gem5/configs/arm_boot_exit_run.py
    b/tests/gem5/configs/arm_boot_exit_run.py
    new file mode 100644
    index 0000000..1e8b52a
    --- /dev/null
    +++ b/tests/gem5/configs/arm_boot_exit_run.py
    @@ -0,0 +1,190 @@
    +# Copyright (c) 2022 The Regents of the University of California
    +# All rights reserved.
    +#
    +# Redistribution and use in source and binary forms, with or without
    +# modification, are permitted provided that the following conditions are
    +# met: redistributions of source code must retain the above copyright
    +# notice, this list of conditions and the following disclaimer;
    +# redistributions in binary form must reproduce the above copyright
    +# notice, this list of conditions and the following disclaimer in the
    +# documentation and/or other materials provided with the distribution;
    +# neither the name of the copyright holders nor the names of its
    +# contributors may be used to endorse or promote products derived from
    +# this software without specific prior written permission.
    +#
    +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
    +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
    +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+"""
+This example runs a simple linux boot on the ArmBoard.
+
+Characteristics
+---------------
+
+* Runs exclusively on the ARM ISA with the classic caches
+"""
+
+from gem5.isas import ISA
+from m5.objects import ArmDefaultRelease
+from gem5.utils.requires import requires
+from gem5.resources.resource import Resource
+from gem5.simulate.simulator import Simulator
+from m5.objects import VExpress_GEM5_Foundation
+from gem5.components.boards.arm_board import ArmBoard
+from gem5.components.processors.simple_processor import SimpleProcessor
+from gem5.components.processors.cpu_types import (

  • get_cpu_types_str_set,
  • get_cpu_type_from_str,
  • CPUTypes,
    +)

+import argparse
+import importlib
+
+parser = argparse.ArgumentParser(

  • description="A script to run the ARM boot exit tests."
    +)

+parser.add_argument(

  • "-n",
  • "--num-cpus",
  • type=int,
  • required=True,
  • help="The number of CPUs.",
    +)

+parser.add_argument(

  • "-c",
  • "--cpu",
  • type=str,
  • choices=get_cpu_types_str_set(),
  • required=True,
  • help="The CPU type.",
    +)

+parser.add_argument(

  • "-m",
  • "--mem-system",
  • type=str,
  • choices=("classic"),
  • required=True,
  • help="The memory system.",
    +)

+parser.add_argument(

  • "-d",
  • "--dram-class",
  • type=str,
  • required=False,
  • default="DualChannelDDR3_1600",
  • help="The python class for the memory interface to use",
    +)

+parser.add_argument(

  • "-t",
  • "--tick-exit",
  • type=int,
  • required=False,
  • help="The tick to exit the simulation.",
    +)

+parser.add_argument(

  • "-r",
  • "--resource-directory",
  • type=str,
  • required=False,
  • help="The directory in which resources will be downloaded or exist.",
    +)

+args = parser.parse_args()
+
+# Run a check to ensure the right version of gem5 is being used.
+requires(isa_required=ISA.ARM)
+
+if args.mem_system == "classic":

  • from
    gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy
    import (
  •    PrivateL1PrivateL2CacheHierarchy,
    
  • )
  • Setup the cache hierarchy.

  • cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
  •    l1d_size="32KiB", l1i_size="32KiB", l2_size="512KiB"
    
  • )
    +else:
  • raise NotImplementedError(
  •    "Memory type '{}' is not supported in the boot tests.".format(
    
  •        args.mem_system
    
  •    )
    
  • )

+# Setup the system memory.
+python_module = "gem5.components.memory"
+memory_class = getattr(importlib.import_module(python_module),
args.dram_class)
+memory = memory_class(size="4GiB")
+
+# Setup a processor.
+
+cpu_type = get_cpu_type_from_str(args.cpu)
+
+processor = SimpleProcessor(

  • cpu_type=cpu_type, num_cores=args.num_cpus, isa=ISA.ARM
    +)

+# The ArmBoard requires a release to be specified.
+
+release = ArmDefaultRelease()
+
+# The platform sets up the memory ranges of all the on-chip and off-chip
+# devices present on the ARM system.
+
+platform = VExpress_GEM5_Foundation()
+
+# Setup the board.
+board = ArmBoard(

  • clk_freq="1GHz",
  • processor=processor,
  • memory=memory,
  • cache_hierarchy=cache_hierarchy,
  • release=release,
  • platform=platform,
    +)

+# Set the Full System workload.
+board.set_kernel_disk_workload(

  • kernel=Resource(
  •    "arm64-linux-kernel-5.4.49",
    
  •    resource_directory=args.resource_directory,
    
  • ),
  • bootloader=Resource(
  •    "arm64-bootloader-foundation",
    
  •    resource_directory=args.resource_directory,
    
  • ),
  • disk_image=Resource(
  •    "arm64-ubuntu-20.04-img",
    
  •    resource_directory=args.resource_directory,
    
  • ),
    +)

+simulator = Simulator(board=board)
+
+if args.tick_exit:

  • simulator.run(max_ticks=args.tick_exit)
    +else:
  • simulator.run()

+print(

  • "Exiting @ tick {} because {}.".format(
  •    simulator.get_current_tick(),
    
  •    simulator.get_last_exit_event_cause(),
    
  • )
    +)

--
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https://gem5-review.googlesource.com/c/public/gem5/+/62194?usp=email
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I9cb78424cf236e9092b4d4d34b68b1589b50ef37
Gerrit-Change-Number: 62194
Gerrit-PatchSet: 10
Gerrit-Owner: Kaustav Goswami kggoswami@ucdavis.edu
Gerrit-Reviewer: Andreas Sandberg andreas.sandberg@arm.com
Gerrit-Reviewer: Bobby Bruce bbruce@ucdavis.edu
Gerrit-Reviewer: Giacomo Travaglini giacomo.travaglini@arm.com
Gerrit-Reviewer: kokoro noreply+kokoro@google.com
Gerrit-MessageType: merged

Bobby Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/62194?usp=email ) Change subject: arch-arm,tests: added arm-linux-boot tests for the ArmBoard ...................................................................... arch-arm,tests: added arm-linux-boot tests for the ArmBoard This change adds ARM boot tests for the ArmBoard. The tests are similar to existing boot tests which supports both m5 exit instructions and a max-tick input format. Change-Id: I9cb78424cf236e9092b4d4d34b68b1589b50ef37 Signed-off-by: Kaustav Goswami <kggoswami@ucdavis.edu> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62194 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu> Maintainer: Bobby Bruce <bbruce@ucdavis.edu> --- A tests/gem5/arm-boot-tests/test_linux_boot.py A tests/gem5/configs/arm_boot_exit_run.py 2 files changed, 374 insertions(+), 0 deletions(-) Approvals: Bobby Bruce: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/tests/gem5/arm-boot-tests/test_linux_boot.py b/tests/gem5/arm-boot-tests/test_linux_boot.py new file mode 100644 index 0000000..13a74a3 --- /dev/null +++ b/tests/gem5/arm-boot-tests/test_linux_boot.py @@ -0,0 +1,166 @@ +# Copyright (c) 2022 The Regents of the University of California +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +import re + +from typing import Optional + +from testlib import * + +if config.bin_path: + resource_path = config.bin_path +else: + resource_path = joinpath(absdirpath(__file__), "..", "resources") + + +def test_boot( + cpu: str, + num_cpus: int, + cache_type: str, + memory_class: str, + length: str, + to_tick: Optional[int] = None, +): + + name = f"{cpu}-cpu_{num_cpus}-cores_{cache_type}_{memory_class}_\ +arm-boot-test" + + verifiers = [] + + config_args = [ + "--cpu", + cpu, + "--num-cpus", + str(num_cpus), + "--mem-system", + cache_type, + "--dram-class", + memory_class, + "--resource-directory", + resource_path, + ] + + if to_tick: + name += "_to-tick" + exit_regex = re.compile( + "Exiting @ tick {} because simulate\(\) limit reached".format( + str(to_tick) + ) + ) + verifiers.append(verifier.MatchRegex(exit_regex)) + config_args += ["--tick-exit", str(to_tick)] + else: + name += "_m5-exit" + + gem5_verify_config( + name=name, + verifiers=verifiers, + fixtures=(), + config=joinpath( + config.base_dir, + "tests", + "gem5", + "configs", + "arm_boot_exit_run.py", + ), + config_args=config_args, + valid_isas=(constants.all_compiled_tag,), + valid_hosts=constants.supported_hosts, + length=length, + ) + + +#### The long (pre-submit/Kokoro) tests #### + +test_boot( + cpu="atomic", + num_cpus=1, + cache_type="classic", + memory_class="SingleChannelDDR3_1600", + length=constants.quick_tag, + to_tick=10000000000, +) + +test_boot( + cpu="timing", + num_cpus=1, + cache_type="classic", + memory_class="SingleChannelDDR3_2133", + length=constants.quick_tag, + to_tick=10000000000, +) + +test_boot( + cpu="o3", + num_cpus=1, + cache_type="classic", + memory_class="DualChannelDDR3_1600", + length=constants.quick_tag, + to_tick=10000000000, +) + +test_boot( + cpu="timing", + num_cpus=4, + cache_type="classic", + memory_class="DualChannelDDR3_2133", + length=constants.quick_tag, + to_tick=10000000000, +) + +#### The long (nightly) tests #### + +test_boot( + cpu="atomic", + num_cpus=1, + cache_type="classic", + memory_class="SingleChannelDDR3_1600", + length=constants.long_tag, +) + +test_boot( + cpu="timing", + num_cpus=1, + cache_type="classic", + memory_class="SingleChannelDDR3_2133", + length=constants.long_tag, +) + +test_boot( + cpu="o3", + num_cpus=1, + cache_type="classic", + memory_class="DualChannelDDR3_1600", + length=constants.long_tag, +) + +test_boot( + cpu="timing", + num_cpus=4, + cache_type="classic", + memory_class="HBM2Stack", + length=constants.long_tag, +) diff --git a/tests/gem5/configs/arm_boot_exit_run.py b/tests/gem5/configs/arm_boot_exit_run.py new file mode 100644 index 0000000..1e8b52a --- /dev/null +++ b/tests/gem5/configs/arm_boot_exit_run.py @@ -0,0 +1,190 @@ +# Copyright (c) 2022 The Regents of the University of California +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +""" +This example runs a simple linux boot on the ArmBoard. + +Characteristics +--------------- + +* Runs exclusively on the ARM ISA with the classic caches +""" + +from gem5.isas import ISA +from m5.objects import ArmDefaultRelease +from gem5.utils.requires import requires +from gem5.resources.resource import Resource +from gem5.simulate.simulator import Simulator +from m5.objects import VExpress_GEM5_Foundation +from gem5.components.boards.arm_board import ArmBoard +from gem5.components.processors.simple_processor import SimpleProcessor +from gem5.components.processors.cpu_types import ( + get_cpu_types_str_set, + get_cpu_type_from_str, + CPUTypes, +) + +import argparse +import importlib + +parser = argparse.ArgumentParser( + description="A script to run the ARM boot exit tests." +) + +parser.add_argument( + "-n", + "--num-cpus", + type=int, + required=True, + help="The number of CPUs.", +) + +parser.add_argument( + "-c", + "--cpu", + type=str, + choices=get_cpu_types_str_set(), + required=True, + help="The CPU type.", +) + +parser.add_argument( + "-m", + "--mem-system", + type=str, + choices=("classic"), + required=True, + help="The memory system.", +) + +parser.add_argument( + "-d", + "--dram-class", + type=str, + required=False, + default="DualChannelDDR3_1600", + help="The python class for the memory interface to use", +) + +parser.add_argument( + "-t", + "--tick-exit", + type=int, + required=False, + help="The tick to exit the simulation.", +) + +parser.add_argument( + "-r", + "--resource-directory", + type=str, + required=False, + help="The directory in which resources will be downloaded or exist.", +) + +args = parser.parse_args() + +# Run a check to ensure the right version of gem5 is being used. +requires(isa_required=ISA.ARM) + +if args.mem_system == "classic": + from gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy import ( + PrivateL1PrivateL2CacheHierarchy, + ) + + # Setup the cache hierarchy. + cache_hierarchy = PrivateL1PrivateL2CacheHierarchy( + l1d_size="32KiB", l1i_size="32KiB", l2_size="512KiB" + ) +else: + raise NotImplementedError( + "Memory type '{}' is not supported in the boot tests.".format( + args.mem_system + ) + ) + +# Setup the system memory. +python_module = "gem5.components.memory" +memory_class = getattr(importlib.import_module(python_module), args.dram_class) +memory = memory_class(size="4GiB") + +# Setup a processor. + +cpu_type = get_cpu_type_from_str(args.cpu) + +processor = SimpleProcessor( + cpu_type=cpu_type, num_cores=args.num_cpus, isa=ISA.ARM +) + + +# The ArmBoard requires a `release` to be specified. + +release = ArmDefaultRelease() + +# The platform sets up the memory ranges of all the on-chip and off-chip +# devices present on the ARM system. + +platform = VExpress_GEM5_Foundation() + +# Setup the board. +board = ArmBoard( + clk_freq="1GHz", + processor=processor, + memory=memory, + cache_hierarchy=cache_hierarchy, + release=release, + platform=platform, +) + +# Set the Full System workload. +board.set_kernel_disk_workload( + kernel=Resource( + "arm64-linux-kernel-5.4.49", + resource_directory=args.resource_directory, + ), + bootloader=Resource( + "arm64-bootloader-foundation", + resource_directory=args.resource_directory, + ), + disk_image=Resource( + "arm64-ubuntu-20.04-img", + resource_directory=args.resource_directory, + ), +) + +simulator = Simulator(board=board) + +if args.tick_exit: + simulator.run(max_ticks=args.tick_exit) +else: + simulator.run() + +print( + "Exiting @ tick {} because {}.".format( + simulator.get_current_tick(), + simulator.get_last_exit_event_cause(), + ) +) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/62194?usp=email To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I9cb78424cf236e9092b4d4d34b68b1589b50ef37 Gerrit-Change-Number: 62194 Gerrit-PatchSet: 10 Gerrit-Owner: Kaustav Goswami <kggoswami@ucdavis.edu> Gerrit-Reviewer: Andreas Sandberg <andreas.sandberg@arm.com> Gerrit-Reviewer: Bobby Bruce <bbruce@ucdavis.edu> Gerrit-Reviewer: Giacomo Travaglini <giacomo.travaglini@arm.com> Gerrit-Reviewer: kokoro <noreply+kokoro@google.com> Gerrit-MessageType: merged