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Counters for # DRAM reads, writes, page hits, and page misses

AB
Aritra Bagchi
Fri, Sep 8, 2023 6:55 AM

Hi all,

Can anyone indicate how to extract performance counters such as the number
of DRAM read operations, the number of DRAM write operations, the number of
times a page miss occurs, etc.?

Inside src/mem/mem_ctrl.cc, MemCtrl::recvTimingReq( ) method, there are two
methods for inserting new read and write operations into their respective
queues, namely addToReadQueue( ) and addToWriteQueue( ). Can the #reads and
#writes can be obtained from here? And what about # page hits/misses? Any
help is appreciated.

Regards,
Aritra

Hi all, Can anyone indicate how to extract performance counters such as the number of DRAM read operations, the number of DRAM write operations, the number of times a page miss occurs, etc.? Inside src/mem/mem_ctrl.cc, MemCtrl::recvTimingReq( ) method, there are two methods for inserting new read and write operations into their respective queues, namely addToReadQueue( ) and addToWriteQueue( ). Can the #reads and #writes can be obtained from here? And what about # page hits/misses? Any help is appreciated. Regards, Aritra
EM
Eliot Moss
Fri, Sep 8, 2023 12:36 PM

On 9/8/2023 2:55 AM, Aritra Bagchi via gem5-users wrote:

Hi all,

Can anyone indicate how to extract performance counters such as the number of DRAM read operations,
the number of DRAM write operations, the number of times a page miss occurs, etc.?

Inside src/mem/mem_ctrl.cc, MemCtrl::recvTimingReq( ) method, there are two methods for inserting
new read and write operations into their respective queues, namely addToReadQueue( )
and addToWriteQueue( ). Can the #reads and #writes can be obtained from here? And what about # page
hits/misses? Any help is appreciated.

The way things generally work in gem5 is that you get a stats dump at
the end of a run.  There are also ways to request such dumps more frequently.
You get a lot of details about accesses to caches and memories.  Are you
looking at stats dumps and not seeing what you hope for?

Best - Eliot Moss

On 9/8/2023 2:55 AM, Aritra Bagchi via gem5-users wrote: > Hi all, > > Can anyone indicate how to extract performance counters such as the number of DRAM read operations, > the number of DRAM write operations, the number of times a page miss occurs, etc.? > > Inside src/mem/mem_ctrl.cc, MemCtrl::recvTimingReq( ) method, there are two methods for inserting > new read and write operations into their respective queues, namely addToReadQueue( ) > and addToWriteQueue( ). Can the #reads and #writes can be obtained from here? And what about # page > hits/misses? Any help is appreciated. The way things generally work in gem5 is that you get a stats dump at the end of a run. There are also ways to request such dumps more frequently. You get a lot of details about accesses to caches and memories. Are you looking at stats dumps and not seeing what you hope for? Best - Eliot Moss
AB
Aritra Bagchi
Fri, Sep 8, 2023 12:49 PM

Hi Eliot,

In the stats, I got some of the counters I wanted. In the source code, now
I can look at how they are computed and get ideas. I wanted these data not
at the end of simulation, but at intermediate times, but I could obtain
them by controlling some parameters.

Thanks,
Aritra

On Fri, Sep 8, 2023 at 6:06 PM Eliot Moss moss@cs.umass.edu wrote:

On 9/8/2023 2:55 AM, Aritra Bagchi via gem5-users wrote:

Hi all,

Can anyone indicate how to extract performance counters such as the

number of DRAM read operations,

the number of DRAM write operations, the number of times a page miss

occurs, etc.?

Inside src/mem/mem_ctrl.cc, MemCtrl::recvTimingReq( ) method, there are

two methods for inserting

new read and write operations into their respective queues,

namely addToReadQueue( )

and addToWriteQueue( ). Can the #reads and #writes can be obtained from

here? And what about # page

hits/misses? Any help is appreciated.

The way things generally work in gem5 is that you get a stats dump at
the end of a run.  There are also ways to request such dumps more
frequently.
You get a lot of details about accesses to caches and memories.  Are you
looking at stats dumps and not seeing what you hope for?

Best - Eliot Moss

Hi Eliot, In the stats, I got some of the counters I wanted. In the source code, now I can look at how they are computed and get ideas. I wanted these data not at the end of simulation, but at intermediate times, but I could obtain them by controlling some parameters. Thanks, Aritra On Fri, Sep 8, 2023 at 6:06 PM Eliot Moss <moss@cs.umass.edu> wrote: > On 9/8/2023 2:55 AM, Aritra Bagchi via gem5-users wrote: > > Hi all, > > > > Can anyone indicate how to extract performance counters such as the > number of DRAM read operations, > > the number of DRAM write operations, the number of times a page miss > occurs, etc.? > > > > Inside src/mem/mem_ctrl.cc, MemCtrl::recvTimingReq( ) method, there are > two methods for inserting > > new read and write operations into their respective queues, > namely addToReadQueue( ) > > and addToWriteQueue( ). Can the #reads and #writes can be obtained from > here? And what about # page > > hits/misses? Any help is appreciated. > > The way things generally work in gem5 is that you get a stats dump at > the end of a run. There are also ways to request such dumps more > frequently. > You get a lot of details about accesses to caches and memories. Are you > looking at stats dumps and not seeing what you hope for? > > Best - Eliot Moss >