Hi gem5 community,
I am exploring the arbitration in between the LLC queues in Ruby Memory
Model.
Version: 22.0.0.2
CPU target: x86
Memory model: Ruby
Configuration: 8 cores
num of LLC slices: 8
Therein, I experience FIFO ordering violations.
Error message:
build/X86/mem/ruby/network/MessageBuffer.cc:268: panic: FIFO ordering
violated: [MessageBuffer: consumer-yes [ 0x557c3d7637b0 ]]
board.cache_hierarchy.ruby_system.l1_controllers6.bufferFromL1 name:
board.cache_hierarchy.ruby_system.l1_controllers6.bufferFromL1 current
time: 21962530736748 delta: 333 arrival_time: 21962530737081 last
arrival_time: 21962530737414
Looking at it, it appears that in the L1 controller's Message queue
enqueue, if we see that the queue was blocked, we add a latency by delta.
Now in the next iteration, it experiences current time is less than last
arrival time and it panics out.
Is there any comment on how to take care of this?
I do see that there is an option of randomization in the queue but that I
wanted to avoid.
Thanks and regards,
Dinesh