Hi, I wrote a new cache protocol in slicc. It has three level cache and it can work in some benchmarks, while in some benchmarks it produces "Possible Deadlock detected" error. I use debug-flags to debug this error, and find a request cannot be dealt with in L3 Cache controller. This error will happen when there are no space for a new cache entry. The logic is same as MESI_Three_Level_L2Cache (L3 cache in mesi_three_level cache protocol): MessageBuffer enqueue -> peek buffer -> new request -> cache entry not exist -> replacement -> peek buffer -> cache entry not exist -> trigger GETS/GETX event -> dequeue. However, in the logs, I find that trigger isn't be invoked (doTransition in built code). This request will be dequeued directly. I insert debug information in the second `cache entry not exist` logic, and I can see output from this debug. It seems like following code (doTransition) doesn't run after this output. In the picture is the generated code from slicc state machine. In the log, there's output from DPRINTF. Can anyone give me some debug advice? Thanks, Congwu Zhang