Hi, I was experimenting with MESI_Two_Level and was trying to use it under TSO. In the L1 cache when a cache line undergoes a transition as follows, an eviction signal is not signaled to the core LSQ: I -> IS -> IS_I -> I // Transitions from IS transition({IS, IS_I}, Inv, IS_I) { fi_sendInvAck; l_popRequestQueue; } transition(PF_IS_I, Data_all_Acks, I) { s_deallocateTBE; o_popIncomingResponseQueue; kd_wakeUpDependents; } Such an eviction can be found in S -> I transition ( https://github.com/CSL-KU/SpectreGuard/blob/master/gem5/src/mem/protocol/MESI_Two_Level-L1cache.sm#L1341-L1345 ): transition(S, Inv, I) { forward_external_eviction_to_cpu; fi_sendInvAck; l_popRequestQueue; } Is there a reason we don't have forward_external_eviction_to_cpu in the I->IS->IS_I->I case?