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[S] Change in gem5/gem5[develop]: mem-ruby, gpu-compute: add hit/miss profiling to SQC

MS
Matt Sinclair (Gerrit)
Tue, Jun 21, 2022 10:58 PM

Matt Sinclair has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/60651 )

Change subject: mem-ruby, gpu-compute: add hit/miss profiling to SQC
......................................................................

mem-ruby, gpu-compute: add hit/miss profiling to SQC

This commit updates the Ruby SQC (GPU L1 I$) to perform hit and miss
profiling on each request that reaches it.

Change-Id: I736521b89b5d37d950265f32cf1a6d2ee5316dba
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60651
Maintainer: Matthew Poremba matthew.poremba@amd.com
Reviewed-by: Matthew Poremba matthew.poremba@amd.com
Tested-by: kokoro noreply+kokoro@google.com

M src/mem/ruby/protocol/GPU_VIPER-SQC.sm
1 file changed, 32 insertions(+), 2 deletions(-)

Approvals:
Matthew Poremba: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass

diff --git a/src/mem/ruby/protocol/GPU_VIPER-SQC.sm
b/src/mem/ruby/protocol/GPU_VIPER-SQC.sm
index dea347a..e0140c9 100644
--- a/src/mem/ruby/protocol/GPU_VIPER-SQC.sm
+++ b/src/mem/ruby/protocol/GPU_VIPER-SQC.sm
@@ -291,28 +291,42 @@
}
}

  • // added for profiling

  • action(uu_profileDataMiss, "\udm", desc="Profile SQC demand miss"){

  • L1cache.profileDemandMiss();

  • }

  • action(uu_profileDataHit, "\udh", desc="Profile SQC demand hit"){

  • L1cache.profileDemandHit();

  • }

  • // Transitions

    // transitions from base
    transition({I, V}, Repl, I) {TagArrayRead, TagArrayWrite} {

  • ic_invCache
  • // since we're evicting something, don't bother classifying as hit/miss
  • ic_invCache;
    }
transition(I, Data, V) {TagArrayRead, TagArrayWrite, DataArrayRead} {
  a_allocate;
  • w_writeCache
  • // don't profile this as a hit/miss since it's a reponse from L2,
  • // so we already counted it
  • w_writeCache;
    l_loadDone;
    pr_popResponseQueue;
    }
transition(I, Fetch) {TagArrayRead, TagArrayWrite} {
  nS_issueRdBlkS;
  • uu_profileDataMiss; // since line wasn't in SQC, we missed
    p_popMandatoryQueue;
    }
// simple hit transitions
transition(V, Fetch) {TagArrayRead, DataArrayRead} {
  l_loadDone;
  • uu_profileDataHit; // line was in SQC, so we hit
    p_popMandatoryQueue;
    }
    }

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I736521b89b5d37d950265f32cf1a6d2ee5316dba
Gerrit-Change-Number: 60651
Gerrit-PatchSet: 4
Gerrit-Owner: Matt Sinclair mattdsinclair@gmail.com
Gerrit-Reviewer: Alexandru Duțu alexandru.dutu@amd.com
Gerrit-Reviewer: Jason Lowe-Power jason@lowepower.com
Gerrit-Reviewer: Matt Sinclair mattdsinclair@gmail.com
Gerrit-Reviewer: Matthew Poremba matthew.poremba@amd.com
Gerrit-Reviewer: kokoro noreply+kokoro@google.com
Gerrit-CC: Bradford Beckmann bradford.beckmann@gmail.com
Gerrit-MessageType: merged

Matt Sinclair has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/60651 ) Change subject: mem-ruby, gpu-compute: add hit/miss profiling to SQC ...................................................................... mem-ruby, gpu-compute: add hit/miss profiling to SQC This commit updates the Ruby SQC (GPU L1 I$) to perform hit and miss profiling on each request that reaches it. Change-Id: I736521b89b5d37d950265f32cf1a6d2ee5316dba Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60651 Maintainer: Matthew Poremba <matthew.poremba@amd.com> Reviewed-by: Matthew Poremba <matthew.poremba@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> --- M src/mem/ruby/protocol/GPU_VIPER-SQC.sm 1 file changed, 32 insertions(+), 2 deletions(-) Approvals: Matthew Poremba: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/mem/ruby/protocol/GPU_VIPER-SQC.sm b/src/mem/ruby/protocol/GPU_VIPER-SQC.sm index dea347a..e0140c9 100644 --- a/src/mem/ruby/protocol/GPU_VIPER-SQC.sm +++ b/src/mem/ruby/protocol/GPU_VIPER-SQC.sm @@ -291,28 +291,42 @@ } } + // added for profiling + action(uu_profileDataMiss, "\udm", desc="Profile SQC demand miss"){ + L1cache.profileDemandMiss(); + } + + action(uu_profileDataHit, "\udh", desc="Profile SQC demand hit"){ + L1cache.profileDemandHit(); + } + // Transitions // transitions from base transition({I, V}, Repl, I) {TagArrayRead, TagArrayWrite} { - ic_invCache + // since we're evicting something, don't bother classifying as hit/miss + ic_invCache; } transition(I, Data, V) {TagArrayRead, TagArrayWrite, DataArrayRead} { a_allocate; - w_writeCache + // don't profile this as a hit/miss since it's a reponse from L2, + // so we already counted it + w_writeCache; l_loadDone; pr_popResponseQueue; } transition(I, Fetch) {TagArrayRead, TagArrayWrite} { nS_issueRdBlkS; + uu_profileDataMiss; // since line wasn't in SQC, we missed p_popMandatoryQueue; } // simple hit transitions transition(V, Fetch) {TagArrayRead, DataArrayRead} { l_loadDone; + uu_profileDataHit; // line was in SQC, so we hit p_popMandatoryQueue; } } -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/60651 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I736521b89b5d37d950265f32cf1a6d2ee5316dba Gerrit-Change-Number: 60651 Gerrit-PatchSet: 4 Gerrit-Owner: Matt Sinclair <mattdsinclair@gmail.com> Gerrit-Reviewer: Alexandru Duțu <alexandru.dutu@amd.com> Gerrit-Reviewer: Jason Lowe-Power <jason@lowepower.com> Gerrit-Reviewer: Matt Sinclair <mattdsinclair@gmail.com> Gerrit-Reviewer: Matthew Poremba <matthew.poremba@amd.com> Gerrit-Reviewer: kokoro <noreply+kokoro@google.com> Gerrit-CC: Bradford Beckmann <bradford.beckmann@gmail.com> Gerrit-MessageType: merged