Empathy List Archives

KM

Kodali, Monica Bhargavi

Fri, Mar 19, 2021 8:55 PM

Dear gem5 support community,
Our team is trying to integrate DRAMsim3 with the latest version of Gem5 (https://github.com/gem5/gem5). We were able to successfully build Gem5 with DRAMsim3 by following the steps in the README file under ext/dramsim3, but on executing any test script (such as se.py or low_power_sweep.py) with the option --mem-type=DRAMsim3, we get the following error -

Traceback (most recent call last):
File "<string>", line 1, in <module>
File "build/ARM/python/m5/main.py", line 457, in main
exec(filecode, scope)
File "configs/example/se.py", line 275, in <module>
MemConfig.config_mem(options, system)
File "/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py", line 257, in config_mem
mem_ctrl.dram = dram_intf
File "build/ARM/python/m5/SimObject.py", line 1337, in setattr
hr_value = value
File "build/ARM/python/m5/params.py", line 215, in convert
if isNullPointer(value) and isSimObjectClass(self.ptype):
TypeError: init() takes 1 positional argument but 2 were given
Error setting param MemCtrl.dram to <orphan DRAMsim3>

Could you point us to any resources or provide directions on how the DRAMsim3 memory option can be used with the latest version of Gem5 such that any ini file configured in src/mem/DRAMsim3.py is picked when the option --mem-type=DRAMsim3 is used.

Thanks and Regards,
Monica Bhargavi Kodali.
Aravind Neelakantan.
Ipshita Aggarwal.

Dear gem5 support community, Our team is trying to integrate DRAMsim3 with the latest version of Gem5 (https://github.com/gem5/gem5). We were able to successfully build Gem5 with DRAMsim3 by following the steps in the README file under ext/dramsim3, but on executing any test script (such as se.py or low_power_sweep.py) with the option --mem-type=DRAMsim3, we get the following error - Traceback (most recent call last): File "<string>", line 1, in <module> File "build/ARM/python/m5/main.py", line 457, in main exec(filecode, scope) File "configs/example/se.py", line 275, in <module> MemConfig.config_mem(options, system) File "/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py", line 257, in config_mem mem_ctrl.dram = dram_intf File "build/ARM/python/m5/SimObject.py", line 1337, in __setattr__ hr_value = value File "build/ARM/python/m5/params.py", line 215, in convert if isNullPointer(value) and isSimObjectClass(self.ptype): TypeError: __init__() takes 1 positional argument but 2 were given Error setting param MemCtrl.dram to <orphan DRAMsim3> Could you point us to any resources or provide directions on how the DRAMsim3 memory option can be used with the latest version of Gem5 such that any ini file configured in src/mem/DRAMsim3.py is picked when the option --mem-type=DRAMsim3 is used. Thanks and Regards, Monica Bhargavi Kodali. Aravind Neelakantan. Ipshita Aggarwal.

MS

Mahyar Samani

Thu, Mar 25, 2021 1:31 AM

Hello Monica, Aravind, and Ipshita

Currently the script in configs/common/MemConfig.py does not work with
DRAMSim3 models. You can create a DRAMSim3 controller using the following
piece of code (ini_path should point the ini file for the DRAMSim3 model
you would like to use):
class DS3MemCtrl(DRAMsim3):
def init(self, ini_path):
super(DS3MemCtrl, self).init()
self.configFile = ini_path
You can find all these ini files in the ext/dramsim3/DRAMsim3/configs/

Also, I will add support for DRAMSim3 models in MemConfig.py soon. Please
let me know if you have any questions and if I could be of further
assistance.

Best Regards,

On Fri, Mar 19, 2021 at 1:57 PM Kodali, Monica Bhargavi via gem5-users <
gem5-users(a)gem5.org> wrote:

Dear gem5 support community,
Our team is trying to integrate DRAMsim3 with the latest version of Gem5 (
https://github.com/gem5/gem5). We were able to successfully build Gem5
with DRAMsim3 by following the steps in the README file under ext/dramsim3,
but on executing any test script (such as se.py or low_power_sweep.py) with
the option --mem-type=DRAMsim3, we get the following error -

Traceback (most recent call last):

File "<string>", line 1, in <module>*
File "build/ARM/python/m5/main.py", line 457, in main*
exec(filecode, scope)*
File "configs/example/se.py", line 275, in <module>*
MemConfig.config_mem(options, system)*
File
"/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py",
line 257, in config_mem*
mem_ctrl.dram = dram_intf*
File "build/ARM/python/m5/SimObject.py", line 1337, in setattr*
hr_value = value*
File "build/ARM/python/m5/params.py", line 215, in convert*
if isNullPointer(value) and isSimObjectClass(self.ptype):*
TypeError: init() takes 1 positional argument but 2 were given
Error setting param MemCtrl.dram to <orphan DRAMsim3>

Could you point us to any resources or provide directions on how the
DRAMsim3 memory option can be used with the latest version of Gem5 such
that any ini file configured in src/mem/DRAMsim3.py is picked when the
option --mem-type=DRAMsim3 is used.

Thanks and Regards,
Monica Bhargavi Kodali.
Aravind Neelakantan.
Ipshita Aggarwal.

gem5-users mailing list -- gem5-users(a)gem5.org
To unsubscribe send an email to gem5-users-leave(a)gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

--
Mahyar Samani (he/him/his)
Electrical and Computer Engineering Department
Research Assistant at *DArchR https://arch.cs.ucdavis.edu/ (*2235 Kemper
Hall)
Secretary
ECE-GSA
Vice President
Iranian Student Association at UC Davis
University of California, Davis

Hello Monica, Aravind, and Ipshita Currently the script in configs/common/MemConfig.py does not work with DRAMSim3 models. You can create a DRAMSim3 controller using the following piece of code (ini_path should point the ini file for the DRAMSim3 model you would like to use): class DS3MemCtrl(DRAMsim3): def __init__(self, ini_path): super(DS3MemCtrl, self).__init__() self.configFile = ini_path You can find all these ini files in the ext/dramsim3/DRAMsim3/configs/ Also, I will add support for DRAMSim3 models in MemConfig.py soon. Please let me know if you have any questions and if I could be of further assistance. Best Regards, On Fri, Mar 19, 2021 at 1:57 PM Kodali, Monica Bhargavi via gem5-users < gem5-users(a)gem5.org> wrote: > Dear gem5 support community, > Our team is trying to integrate DRAMsim3 with the latest version of Gem5 ( > https://github.com/gem5/gem5). We were able to successfully build Gem5 > with DRAMsim3 by following the steps in the README file under ext/dramsim3, > but on executing any test script (such as se.py or low_power_sweep.py) with > the option --mem-type=DRAMsim3, we get the following error - > > > *Traceback (most recent call last):* > * File "<string>", line 1, in <module>* > * File "build/ARM/python/m5/main.py", line 457, in main* > * exec(filecode, scope)* > * File "configs/example/se.py", line 275, in <module>* > * MemConfig.config_mem(options, system)* > * File > "/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py", > line 257, in config_mem* > * mem_ctrl.dram = dram_intf* > * File "build/ARM/python/m5/SimObject.py", line 1337, in __setattr__* > * hr_value = value* > * File "build/ARM/python/m5/params.py", line 215, in convert* > * if isNullPointer(value) and isSimObjectClass(self.ptype):* > *TypeError: __init__() takes 1 positional argument but 2 were given* > *Error setting param MemCtrl.dram to <orphan DRAMsim3>* > > > > > Could you point us to any resources or provide directions on how the > DRAMsim3 memory option can be used with the latest version of Gem5 such > that any ini file configured in src/mem/DRAMsim3.py is picked when the > option --mem-type=DRAMsim3 is used. > > > Thanks and Regards, > Monica Bhargavi Kodali. > Aravind Neelakantan. > Ipshita Aggarwal. > _______________________________________________ > gem5-users mailing list -- gem5-users(a)gem5.org > To unsubscribe send an email to gem5-users-leave(a)gem5.org > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s -- Mahyar Samani (he/him/his) Electrical and Computer Engineering Department Research Assistant at *DArchR <https://arch.cs.ucdavis.edu/> (*2235 Kemper Hall) Secretary ECE-GSA Vice President Iranian Student Association at UC Davis University of California, Davis

MS

Mahyar Samani

Thu, Mar 25, 2021 1:33 AM

Btw, the controller from DRAMSim3 does not need an interface connected to
itself (the timings for those models come from DRAMSim3).

Best,

On Wed, Mar 24, 2021 at 6:31 PM Mahyar Samani <msamani(a)ucdavis.edu> wrote:

Hello Monica, Aravind, and Ipshita

Currently the script in configs/common/MemConfig.py does not work with
DRAMSim3 models. You can create a DRAMSim3 controller using the following
piece of code (ini_path should point the ini file for the DRAMSim3 model
you would like to use):
class DS3MemCtrl(DRAMsim3):
def init(self, ini_path):
super(DS3MemCtrl, self).init()
self.configFile = ini_path
You can find all these ini files in the ext/dramsim3/DRAMsim3/configs/

Also, I will add support for DRAMSim3 models in MemConfig.py soon. Please
let me know if you have any questions and if I could be of further
assistance.

Best Regards,

On Fri, Mar 19, 2021 at 1:57 PM Kodali, Monica Bhargavi via gem5-users <
gem5-users(a)gem5.org> wrote:

Dear gem5 support community,
Our team is trying to integrate DRAMsim3 with the latest version of Gem5 (
https://github.com/gem5/gem5). We were able to successfully build Gem5
with DRAMsim3 by following the steps in the README file under ext/dramsim3,
but on executing any test script (such as se.py or low_power_sweep.py) with
the option --mem-type=DRAMsim3, we get the following error -

Traceback (most recent call last):

File "<string>", line 1, in <module>*
File "build/ARM/python/m5/main.py", line 457, in main*
exec(filecode, scope)*
File "configs/example/se.py", line 275, in <module>*
MemConfig.config_mem(options, system)*
File
"/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py",
line 257, in config_mem*
mem_ctrl.dram = dram_intf*
File "build/ARM/python/m5/SimObject.py", line 1337, in setattr*
hr_value = value*
File "build/ARM/python/m5/params.py", line 215, in convert*
if isNullPointer(value) and isSimObjectClass(self.ptype):*
TypeError: init() takes 1 positional argument but 2 were given
Error setting param MemCtrl.dram to <orphan DRAMsim3>

Could you point us to any resources or provide directions on how the
DRAMsim3 memory option can be used with the latest version of Gem5 such
that any ini file configured in src/mem/DRAMsim3.py is picked when the
option --mem-type=DRAMsim3 is used.

Thanks and Regards,
Monica Bhargavi Kodali.
Aravind Neelakantan.
Ipshita Aggarwal.

gem5-users mailing list -- gem5-users(a)gem5.org
To unsubscribe send an email to gem5-users-leave(a)gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

--
Mahyar Samani (he/him/his)
Electrical and Computer Engineering Department
Research Assistant at *DArchR https://arch.cs.ucdavis.edu/ (*2235
Kemper Hall)
Secretary
ECE-GSA
Vice President
Iranian Student Association at UC Davis
University of California, Davis

--
Mahyar Samani (he/him/his)
Electrical and Computer Engineering Department
Research Assistant at *DArchR https://arch.cs.ucdavis.edu/ (*2235 Kemper
Hall)
Secretary
ECE-GSA
Vice President
Iranian Student Association at UC Davis
University of California, Davis

Btw, the controller from DRAMSim3 does not need an interface connected to itself (the timings for those models come from DRAMSim3). Best, On Wed, Mar 24, 2021 at 6:31 PM Mahyar Samani <msamani(a)ucdavis.edu> wrote: > Hello Monica, Aravind, and Ipshita > > Currently the script in configs/common/MemConfig.py does not work with > DRAMSim3 models. You can create a DRAMSim3 controller using the following > piece of code (ini_path should point the ini file for the DRAMSim3 model > you would like to use): > class DS3MemCtrl(DRAMsim3): > def __init__(self, ini_path): > super(DS3MemCtrl, self).__init__() > self.configFile = ini_path > You can find all these ini files in the ext/dramsim3/DRAMsim3/configs/ > > Also, I will add support for DRAMSim3 models in MemConfig.py soon. Please > let me know if you have any questions and if I could be of further > assistance. > > Best Regards, > > On Fri, Mar 19, 2021 at 1:57 PM Kodali, Monica Bhargavi via gem5-users < > gem5-users(a)gem5.org> wrote: > >> Dear gem5 support community, >> Our team is trying to integrate DRAMsim3 with the latest version of Gem5 ( >> https://github.com/gem5/gem5). We were able to successfully build Gem5 >> with DRAMsim3 by following the steps in the README file under ext/dramsim3, >> but on executing any test script (such as se.py or low_power_sweep.py) with >> the option --mem-type=DRAMsim3, we get the following error - >> >> >> *Traceback (most recent call last):* >> * File "<string>", line 1, in <module>* >> * File "build/ARM/python/m5/main.py", line 457, in main* >> * exec(filecode, scope)* >> * File "configs/example/se.py", line 275, in <module>* >> * MemConfig.config_mem(options, system)* >> * File >> "/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py", >> line 257, in config_mem* >> * mem_ctrl.dram = dram_intf* >> * File "build/ARM/python/m5/SimObject.py", line 1337, in __setattr__* >> * hr_value = value* >> * File "build/ARM/python/m5/params.py", line 215, in convert* >> * if isNullPointer(value) and isSimObjectClass(self.ptype):* >> *TypeError: __init__() takes 1 positional argument but 2 were given* >> *Error setting param MemCtrl.dram to <orphan DRAMsim3>* >> >> >> >> >> Could you point us to any resources or provide directions on how the >> DRAMsim3 memory option can be used with the latest version of Gem5 such >> that any ini file configured in src/mem/DRAMsim3.py is picked when the >> option --mem-type=DRAMsim3 is used. >> >> >> Thanks and Regards, >> Monica Bhargavi Kodali. >> Aravind Neelakantan. >> Ipshita Aggarwal. >> _______________________________________________ >> gem5-users mailing list -- gem5-users(a)gem5.org >> To unsubscribe send an email to gem5-users-leave(a)gem5.org >> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s > > > > -- > Mahyar Samani (he/him/his) > Electrical and Computer Engineering Department > Research Assistant at *DArchR <https://arch.cs.ucdavis.edu/> (*2235 > Kemper Hall) > Secretary > ECE-GSA > Vice President > Iranian Student Association at UC Davis > University of California, Davis > -- Mahyar Samani (he/him/his) Electrical and Computer Engineering Department Research Assistant at *DArchR <https://arch.cs.ucdavis.edu/> (*2235 Kemper Hall) Secretary ECE-GSA Vice President Iranian Student Association at UC Davis University of California, Davis

AI

Aggarwal, Ipshita

Fri, Mar 26, 2021 6:26 PM

Hi Mahyar,

Thank you for your time, we will try it out over the weekend and get back to you.

Kind Regards,
Ipshita

From: Mahyar Samani <msamani(a)ucdavis.edu>
Sent: Wednesday, March 24, 2021 9:34 PM
To: gem5 users mailing list <gem5-users(a)gem5.org>
Cc: Aggarwal, Ipshita <ipshita.aggarwal(a)ufl.edu>; Neelakantan,Aravind <aravindneela(a)ufl.edu>; Kodali, Monica Bhargavi <mkodali(a)ufl.edu>
Subject: Re: [gem5-users] ISSUES FACING WHILE INTEGRATING GEM5 AND DRAMSIM3

[External Email]

Btw, the controller from DRAMSim3 does not need an interface connected to itself (the timings for those models come from DRAMSim3).

Best,

On Wed, Mar 24, 2021 at 6:31 PM Mahyar Samani <msamani(a)ucdavis.edumailto:msamani(a)ucdavis.edu> wrote:
Hello Monica, Aravind, and Ipshita

Currently the script in configs/common/MemConfig.py does not work with DRAMSim3 models. You can create a DRAMSim3 controller using the following piece of code (ini_path should point the ini file for the DRAMSim3 model you would like to use):
class DS3MemCtrl(DRAMsim3):
def init(self, ini_path):
super(DS3MemCtrl, self).init()
self.configFile = ini_path
You can find all these ini files in the ext/dramsim3/DRAMsim3/configs/

Also, I will add support for DRAMSim3 models in MemConfig.py soon. Please let me know if you have any questions and if I could be of further assistance.

Best Regards,

On Fri, Mar 19, 2021 at 1:57 PM Kodali, Monica Bhargavi via gem5-users <gem5-users(a)gem5.orgmailto:gem5-users(a)gem5.org> wrote:
Dear gem5 support community,
Our team is trying to integrate DRAMsim3 with the latest version of Gem5 (https://github.com/gem5/gem5 https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_gem5_gem5&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=gD7tVbU7COKkxWliplkCKqmFI6x1f8qd5qZFmIIdY8E&m=Lwni6XMCJkRlqLw8uvVkouK9mbIWsX3zImpYvac2FCA&s=jTMpta1i2TpQvSzdQwet0Ez4fgffR1DsJ3Mz_t7RZI0&e=). We were able to successfully build Gem5 with DRAMsim3 by following the steps in the README file under ext/dramsim3, but on executing any test script (such as se.py or low_power_sweep.py) with the option --mem-type=DRAMsim3, we get the following error -

Traceback (most recent call last):
File "<string>", line 1, in <module>
File "build/ARM/python/m5/main.py", line 457, in main
exec(filecode, scope)
File "configs/example/se.py", line 275, in <module>
MemConfig.config_mem(options, system)
File "/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py", line 257, in config_mem
mem_ctrl.dram = dram_intf
File "build/ARM/python/m5/SimObject.py", line 1337, in setattr
hr_value = value
File "build/ARM/python/m5/params.py", line 215, in convert
if isNullPointer(value) and isSimObjectClass(self.ptype):
TypeError: init() takes 1 positional argument but 2 were given
Error setting param MemCtrl.dram to <orphan DRAMsim3>

Could you point us to any resources or provide directions on how the DRAMsim3 memory option can be used with the latest version of Gem5 such that any ini file configured in src/mem/DRAMsim3.py is picked when the option --mem-type=DRAMsim3 is used.

Thanks and Regards,
Monica Bhargavi Kodali.
Aravind Neelakantan.
Ipshita Aggarwal.

gem5-users mailing list -- gem5-users(a)gem5.orgmailto:gem5-users(a)gem5.org
To unsubscribe send an email to gem5-users-leave(a)gem5.orgmailto:gem5-users-leave(a)gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

--
Mahyar Samani (he/him/his)
Electrical and Computer Engineering Department
Research Assistant at DArchRhttps://urldefense.proofpoint.com/v2/url?u=https-3A__arch.cs.ucdavis.edu_&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=gD7tVbU7COKkxWliplkCKqmFI6x1f8qd5qZFmIIdY8E&m=Lwni6XMCJkRlqLw8uvVkouK9mbIWsX3zImpYvac2FCA&s=JW1lYUCrtVqeX9vUVfs-aigFyaPydKkdihfWYNAnGh0&e= (2235 Kemper Hall)
Secretary
ECE-GSA
Vice President
Iranian Student Association at UC Davis
University of California, Davis

Hi Mahyar, Thank you for your time, we will try it out over the weekend and get back to you. Kind Regards, Ipshita From: Mahyar Samani <msamani(a)ucdavis.edu> Sent: Wednesday, March 24, 2021 9:34 PM To: gem5 users mailing list <gem5-users(a)gem5.org> Cc: Aggarwal, Ipshita <ipshita.aggarwal(a)ufl.edu>; Neelakantan,Aravind <aravindneela(a)ufl.edu>; Kodali, Monica Bhargavi <mkodali(a)ufl.edu> Subject: Re: [gem5-users] ISSUES FACING WHILE INTEGRATING GEM5 AND DRAMSIM3 [External Email] Btw, the controller from DRAMSim3 does not need an interface connected to itself (the timings for those models come from DRAMSim3). Best, On Wed, Mar 24, 2021 at 6:31 PM Mahyar Samani <msamani(a)ucdavis.edu<mailto:msamani(a)ucdavis.edu>> wrote: Hello Monica, Aravind, and Ipshita Currently the script in configs/common/MemConfig.py does not work with DRAMSim3 models. You can create a DRAMSim3 controller using the following piece of code (ini_path should point the ini file for the DRAMSim3 model you would like to use): class DS3MemCtrl(DRAMsim3): def __init__(self, ini_path): super(DS3MemCtrl, self).__init__() self.configFile = ini_path You can find all these ini files in the ext/dramsim3/DRAMsim3/configs/ Also, I will add support for DRAMSim3 models in MemConfig.py soon. Please let me know if you have any questions and if I could be of further assistance. Best Regards, On Fri, Mar 19, 2021 at 1:57 PM Kodali, Monica Bhargavi via gem5-users <gem5-users(a)gem5.org<mailto:gem5-users(a)gem5.org>> wrote: Dear gem5 support community, Our team is trying to integrate DRAMsim3 with the latest version of Gem5 (https://github.com/gem5/gem5<https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_gem5_gem5&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=gD7tVbU7COKkxWliplkCKqmFI6x1f8qd5qZFmIIdY8E&m=Lwni6XMCJkRlqLw8uvVkouK9mbIWsX3zImpYvac2FCA&s=jTMpta1i2TpQvSzdQwet0Ez4fgffR1DsJ3Mz_t7RZI0&e=>). We were able to successfully build Gem5 with DRAMsim3 by following the steps in the README file under ext/dramsim3, but on executing any test script (such as se.py or low_power_sweep.py) with the option --mem-type=DRAMsim3, we get the following error - Traceback (most recent call last): File "<string>", line 1, in <module> File "build/ARM/python/m5/main.py", line 457, in main exec(filecode, scope) File "configs/example/se.py", line 275, in <module> MemConfig.config_mem(options, system) File "/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py", line 257, in config_mem mem_ctrl.dram = dram_intf File "build/ARM/python/m5/SimObject.py", line 1337, in __setattr__ hr_value = value File "build/ARM/python/m5/params.py", line 215, in convert if isNullPointer(value) and isSimObjectClass(self.ptype): TypeError: __init__() takes 1 positional argument but 2 were given Error setting param MemCtrl.dram to <orphan DRAMsim3> Could you point us to any resources or provide directions on how the DRAMsim3 memory option can be used with the latest version of Gem5 such that any ini file configured in src/mem/DRAMsim3.py is picked when the option --mem-type=DRAMsim3 is used. Thanks and Regards, Monica Bhargavi Kodali. Aravind Neelakantan. Ipshita Aggarwal. _______________________________________________ gem5-users mailing list -- gem5-users(a)gem5.org<mailto:gem5-users(a)gem5.org> To unsubscribe send an email to gem5-users-leave(a)gem5.org<mailto:gem5-users-leave(a)gem5.org> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s -- Mahyar Samani (he/him/his) Electrical and Computer Engineering Department Research Assistant at DArchR<https://urldefense.proofpoint.com/v2/url?u=https-3A__arch.cs.ucdavis.edu_&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=gD7tVbU7COKkxWliplkCKqmFI6x1f8qd5qZFmIIdY8E&m=Lwni6XMCJkRlqLw8uvVkouK9mbIWsX3zImpYvac2FCA&s=JW1lYUCrtVqeX9vUVfs-aigFyaPydKkdihfWYNAnGh0&e=> (2235 Kemper Hall) Secretary ECE-GSA Vice President Iranian Student Association at UC Davis University of California, Davis -- Mahyar Samani (he/him/his) Electrical and Computer Engineering Department Research Assistant at DArchR<https://urldefense.proofpoint.com/v2/url?u=https-3A__arch.cs.ucdavis.edu_&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=gD7tVbU7COKkxWliplkCKqmFI6x1f8qd5qZFmIIdY8E&m=Lwni6XMCJkRlqLw8uvVkouK9mbIWsX3zImpYvac2FCA&s=JW1lYUCrtVqeX9vUVfs-aigFyaPydKkdihfWYNAnGh0&e=> (2235 Kemper Hall) Secretary ECE-GSA Vice President Iranian Student Association at UC Davis University of California, Davis

H

haurunis@gmail.com

Sun, Mar 28, 2021 2:21 PM

Hi Mahyar,

Sorry to bother but I would like to ask a related question:
So for better DRAM power/timing simulation, will DRAMSim3 be the best among DRAMCtrl (gem5-prebuilt) and DRAMSim2? The reason I am asking is that I also tried to get DRAMSim2 to work in gem5. However, following the /ext/DRAMSim2/readme, I kept running into


Usage: se.py [options]

se.py: error: option --mem-type: invalid choice:

Hi Mahyar, Sorry to bother but I would like to ask a related question: So for better DRAM power/timing simulation, will DRAMSim3 be the best among DRAMCtrl (gem5-prebuilt) and DRAMSim2? The reason I am asking is that I also tried to get DRAMSim2 to work in gem5. However, following the /ext/DRAMSim2/readme, I kept running into ```command line: build/X86/gem5.opt configs/example/se.py -c tests/test-progs/hello/bin/x86/linux/hello --cpu-type=TraceCPU --caches --l2cache --mem-type=dramsim2 Usage: se.py [options] se.py: error: option --mem-type: invalid choice: ```

MS

Mahyar Samani

Mon, Mar 29, 2021 4:23 PM

Hello,

I would say overall DRAMSim3 is more accurate and to be honest it is much
easier to use than DRAMSim2. I am also doing an evaluation on memory models
between DRAMSim3 and gem5, based on the current results I would suggest you
use either DRAMSim3 (using the temporary solution I proposed) or gem5
models.

Best Regards,

On Sun, Mar 28, 2021 at 7:23 AM haurunis--- via gem5-users <
gem5-users(a)gem5.org> wrote:

Hi Mahyar,

Sorry to bother but I would like to ask a related question:
So for better DRAM power/timing simulation, will DRAMSim3 be the best
among DRAMCtrl (gem5-prebuilt) and DRAMSim2? The reason I am asking is that
I also tried to get DRAMSim2 to work in gem5. However, following the
/ext/DRAMSim2/readme, I kept running into

tests/test-progs/hello/bin/x86/linux/hello --cpu-type=TraceCPU --caches
--l2cache --mem-type=dramsim2

Usage: se.py [options]

se.py: error: option --mem-type: invalid choice:

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--
Mahyar Samani (he/him/his)
Electrical and Computer Engineering Department
Research Assistant at *DArchR https://arch.cs.ucdavis.edu/ (*2235 Kemper
Hall)
Secretary
ECE-GSA
Vice President
Iranian Student Association at UC Davis
University of California, Davis

Hello, I would say overall DRAMSim3 is more accurate and to be honest it is much easier to use than DRAMSim2. I am also doing an evaluation on memory models between DRAMSim3 and gem5, based on the current results I would suggest you use either DRAMSim3 (using the temporary solution I proposed) or gem5 models. Best Regards, On Sun, Mar 28, 2021 at 7:23 AM haurunis--- via gem5-users < gem5-users(a)gem5.org> wrote: > Hi Mahyar, > > Sorry to bother but I would like to ask a related question: > So for better DRAM power/timing simulation, will DRAMSim3 be the best > among DRAMCtrl (gem5-prebuilt) and DRAMSim2? The reason I am asking is that > I also tried to get DRAMSim2 to work in gem5. However, following the > /ext/DRAMSim2/readme, I kept running into > ```command line: build/X86/gem5.opt configs/example/se.py -c > tests/test-progs/hello/bin/x86/linux/hello --cpu-type=TraceCPU --caches > --l2cache --mem-type=dramsim2 > > Usage: se.py [options] > > se.py: error: option --mem-type: invalid choice: > ``` > _______________________________________________ > gem5-users mailing list -- gem5-users(a)gem5.org > To unsubscribe send an email to gem5-users-leave(a)gem5.org > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s > -- Mahyar Samani (he/him/his) Electrical and Computer Engineering Department Research Assistant at *DArchR <https://arch.cs.ucdavis.edu/> (*2235 Kemper Hall) Secretary ECE-GSA Vice President Iranian Student Association at UC Davis University of California, Davis

KM

Kodali, Monica Bhargavi

Mon, Mar 29, 2021 4:36 PM

Ok thank you
Best regards,
Monica Bhargavi Kodali.

Get Outlook for Androidhttps://aka.ms/AAb9ysg

From: Mahyar Samani via gem5-users <gem5-users(a)gem5.org>
Sent: Monday, March 29, 2021 12:23:00 PM
To: gem5 users mailing list <gem5-users(a)gem5.org>
Cc: haurunis(a)gmail.com <haurunis(a)gmail.com>; Mahyar Samani <msamani(a)ucdavis.edu>
Subject: [gem5-users] Re: ISSUES FACING WHILE INTEGRATING GEM5 AND DRAMSIM3

[External Email]
Hello,

I would say overall DRAMSim3 is more accurate and to be honest it is much easier to use than DRAMSim2. I am also doing an evaluation on memory models between DRAMSim3 and gem5, based on the current results I would suggest you use either DRAMSim3 (using the temporary solution I proposed) or gem5 models.

Best Regards,

On Sun, Mar 28, 2021 at 7:23 AM haurunis--- via gem5-users <gem5-users(a)gem5.orgmailto:gem5-users(a)gem5.org> wrote:
Hi Mahyar,

Sorry to bother but I would like to ask a related question:
So for better DRAM power/timing simulation, will DRAMSim3 be the best among DRAMCtrl (gem5-prebuilt) and DRAMSim2? The reason I am asking is that I also tried to get DRAMSim2 to work in gem5. However, following the /ext/DRAMSim2/readme, I kept running into


Usage: se.py [options]

se.py: error: option --mem-type: invalid choice:

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--
Mahyar Samani (he/him/his)
Electrical and Computer Engineering Department
Research Assistant at DArchRhttps://urldefense.proofpoint.com/v2/url?u=https-3A__arch.cs.ucdavis.edu_&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=t_EfxZZf5_p7aa-3fmQ3iw&m=iAqdqVKViSqOxiV7VqxYL9-EeQ9O_-m-PvebKS97Cmo&s=RiUnuSKIa78tZ-aksdmLbNFceMNy5I7A6BxaYu9U2EA&e= (2235 Kemper Hall)
Secretary
ECE-GSA
Vice President
Iranian Student Association at UC Davis
University of California, Davis

Ok thank you Best regards, Monica Bhargavi Kodali. Get Outlook for Android<https://aka.ms/AAb9ysg> ________________________________ From: Mahyar Samani via gem5-users <gem5-users(a)gem5.org> Sent: Monday, March 29, 2021 12:23:00 PM To: gem5 users mailing list <gem5-users(a)gem5.org> Cc: haurunis(a)gmail.com <haurunis(a)gmail.com>; Mahyar Samani <msamani(a)ucdavis.edu> Subject: [gem5-users] Re: ISSUES FACING WHILE INTEGRATING GEM5 AND DRAMSIM3 [External Email] Hello, I would say overall DRAMSim3 is more accurate and to be honest it is much easier to use than DRAMSim2. I am also doing an evaluation on memory models between DRAMSim3 and gem5, based on the current results I would suggest you use either DRAMSim3 (using the temporary solution I proposed) or gem5 models. Best Regards, On Sun, Mar 28, 2021 at 7:23 AM haurunis--- via gem5-users <gem5-users(a)gem5.org<mailto:gem5-users(a)gem5.org>> wrote: Hi Mahyar, Sorry to bother but I would like to ask a related question: So for better DRAM power/timing simulation, will DRAMSim3 be the best among DRAMCtrl (gem5-prebuilt) and DRAMSim2? The reason I am asking is that I also tried to get DRAMSim2 to work in gem5. However, following the /ext/DRAMSim2/readme, I kept running into ```command line: build/X86/gem5.opt configs/example/se.py -c tests/test-progs/hello/bin/x86/linux/hello --cpu-type=TraceCPU --caches --l2cache --mem-type=dramsim2 Usage: se.py [options] se.py: error: option --mem-type: invalid choice: ``` _______________________________________________ gem5-users mailing list -- gem5-users(a)gem5.org<mailto:gem5-users(a)gem5.org> To unsubscribe send an email to gem5-users-leave(a)gem5.org<mailto:gem5-users-leave(a)gem5.org> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s -- Mahyar Samani (he/him/his) Electrical and Computer Engineering Department Research Assistant at DArchR<https://urldefense.proofpoint.com/v2/url?u=https-3A__arch.cs.ucdavis.edu_&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=t_EfxZZf5_p7aa-3fmQ3iw&m=iAqdqVKViSqOxiV7VqxYL9-EeQ9O_-m-PvebKS97Cmo&s=RiUnuSKIa78tZ-aksdmLbNFceMNy5I7A6BxaYu9U2EA&e=> (2235 Kemper Hall) Secretary ECE-GSA Vice President Iranian Student Association at UC Davis University of California, Davis

KM

Kodali, Monica Bhargavi

Tue, Mar 30, 2021 5:04 PM

Thank you for your help. Now the DRAMsim3 is getting picked up. Now we are facing an address range intersection error. Th error is displayed below:

build/ARM/gem5.opt configs/example/se.py --mem-type=DRAMsim3 --cmd=tests/test-progs/hello/bin/arm/linux/hello

command line: build/ARM/gem5.opt configs/example/se.py --mem-type=DRAMsim3 --cmd=tests/test-progs/hello/bin/arm/linux/hello

warn: membus.slave is deprecated. slave is now called cpu_side_ports

Global frequency set at 1000000000000 ticks per second

fatal: fatal condition addrMap.insert(m->getAddrRange(), m) == addrMap.end() occurred: Memory address range for system.mem_ctrls.dram is overlapping

Memory Usage: 104380 KBytes

The above error highlighted is spotted in gem5/src/mem/physical.cchttp://physical.cc.

1.We tried changing the address range by using --mem-size= 8192MB,2GB .

2.Changes are made in configs/common/MemConfig.py.

if opt_mem_type== "DRAMsim3":

                mem_ctrl= m5.objects.DRAMsim3()

3.Changes are made in src/mem/MemCtrl.py.(ini_path points to the ini file describing the model you want to simulate, you can find them in ext/dramsim3/DRAMsim3/configs)

class DS3MemCtrl(DRAMsim3):

          def __init__(self, ini_path):

                super(DS3MemCtrl, self).__init__()

                self.configFile = ini_path

But the issue is not being resolved. So can you please point us to any resources or provide directions on how to avoid the memory address range overlap.

Thanks and Regards,
Monica Bhargavi Kodali
Ipshita Aggarwal
Aravind Neelakantan

On Mar 24, 2021, at 9:31 PM, Mahyar Samani <msamani(a)ucdavis.edumailto:msamani(a)ucdavis.edu> wrote:

[External Email]
Hello Monica, Aravind, and Ipshita

Currently the script in configs/common/MemConfig.py does not work with DRAMSim3 models. You can create a DRAMSim3 controller using the following piece of code (ini_path should point the ini file for the DRAMSim3 model you would like to use):
class DS3MemCtrl(DRAMsim3):
def init(self, ini_path):
super(DS3MemCtrl, self).init()
self.configFile = ini_path
You can find all these ini files in the ext/dramsim3/DRAMsim3/configs/

Also, I will add support for DRAMSim3 models in MemConfig.py soon. Please let me know if you have any questions and if I could be of further assistance.

Best Regards,

On Fri, Mar 19, 2021 at 1:57 PM Kodali, Monica Bhargavi via gem5-users <gem5-users(a)gem5.orgmailto:gem5-users(a)gem5.org> wrote:
Dear gem5 support community,
Our team is trying to integrate DRAMsim3 with the latest version of Gem5 (https://github.com/gem5/gem5 https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_gem5_gem5&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=t_EfxZZf5_p7aa-3fmQ3iw&m=w31pbsf0NjSusmMymlxhhQdQQBIKO_S6WI9SjJkacfs&s=4UBINNCsoRmcaCegPeCwce2iMfdxMXekEmem3pM1QIA&e=). We were able to successfully build Gem5 with DRAMsim3 by following the steps in the README file under ext/dramsim3, but on executing any test script (such as se.py or low_power_sweep.py) with the option --mem-type=DRAMsim3, we get the following error -

Traceback (most recent call last):
File "<string>", line 1, in <module>
File "build/ARM/python/m5/main.py", line 457, in main
exec(filecode, scope)
File "configs/example/se.py", line 275, in <module>
MemConfig.config_mem(options, system)
File "/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py", line 257, in config_mem
mem_ctrl.dram = dram_intf
File "build/ARM/python/m5/SimObject.py", line 1337, in setattr
hr_value = value
File "build/ARM/python/m5/params.py", line 215, in convert
if isNullPointer(value) and isSimObjectClass(self.ptype):
TypeError: init() takes 1 positional argument but 2 were given
Error setting param MemCtrl.dram to <orphan DRAMsim3>

Could you point us to any resources or provide directions on how the DRAMsim3 memory option can be used with the latest version of Gem5 such that any ini file configured in src/mem/DRAMsim3.py is picked when the option --mem-type=DRAMsim3 is used.

Thanks and Regards,
Monica Bhargavi Kodali.
Aravind Neelakantan.
Ipshita Aggarwal.

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--
Mahyar Samani (he/him/his)
Electrical and Computer Engineering Department
Research Assistant at DArchRhttps://urldefense.proofpoint.com/v2/url?u=https-3A__arch.cs.ucdavis.edu_&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=t_EfxZZf5_p7aa-3fmQ3iw&m=w31pbsf0NjSusmMymlxhhQdQQBIKO_S6WI9SjJkacfs&s=dcYvIoHuyyE_Uq5NW8Ge8W34Z1sUTehXLbe2jq0_8ls&e= (2235 Kemper Hall)
Secretary
ECE-GSA
Vice President
Iranian Student Association at UC Davis
University of California, Davis

Thank you for your help. Now the DRAMsim3 is getting picked up. Now we are facing an address range intersection error. Th error is displayed below: build/ARM/gem5.opt configs/example/se.py --mem-type=DRAMsim3 --cmd=tests/test-progs/hello/bin/arm/linux/hello command line: build/ARM/gem5.opt configs/example/se.py --mem-type=DRAMsim3 --cmd=tests/test-progs/hello/bin/arm/linux/hello warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports` warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports` warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports` warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports` warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports` Global frequency set at 1000000000000 ticks per second fatal: fatal condition addrMap.insert(m->getAddrRange(), m) == addrMap.end() occurred: Memory address range for system.mem_ctrls.dram is overlapping Memory Usage: 104380 KBytes The above error highlighted is spotted in gem5/src/mem/physical.cc<http://physical.cc>. 1.We tried changing the address range by using --mem-size= 8192MB,2GB . 2.Changes are made in configs/common/MemConfig.py. if opt_mem_type== "DRAMsim3": mem_ctrl= m5.objects.DRAMsim3() 3.Changes are made in src/mem/MemCtrl.py.(ini_path points to the ini file describing the model you want to simulate, you can find them in ext/dramsim3/DRAMsim3/configs) class DS3MemCtrl(DRAMsim3): def __init__(self, ini_path): super(DS3MemCtrl, self).__init__() self.configFile = ini_path But the issue is not being resolved. So can you please point us to any resources or provide directions on how to avoid the memory address range overlap. Thanks and Regards, Monica Bhargavi Kodali Ipshita Aggarwal Aravind Neelakantan On Mar 24, 2021, at 9:31 PM, Mahyar Samani <msamani(a)ucdavis.edu<mailto:msamani(a)ucdavis.edu>> wrote: [External Email] Hello Monica, Aravind, and Ipshita Currently the script in configs/common/MemConfig.py does not work with DRAMSim3 models. You can create a DRAMSim3 controller using the following piece of code (ini_path should point the ini file for the DRAMSim3 model you would like to use): class DS3MemCtrl(DRAMsim3): def __init__(self, ini_path): super(DS3MemCtrl, self).__init__() self.configFile = ini_path You can find all these ini files in the ext/dramsim3/DRAMsim3/configs/ Also, I will add support for DRAMSim3 models in MemConfig.py soon. Please let me know if you have any questions and if I could be of further assistance. Best Regards, On Fri, Mar 19, 2021 at 1:57 PM Kodali, Monica Bhargavi via gem5-users <gem5-users(a)gem5.org<mailto:gem5-users(a)gem5.org>> wrote: Dear gem5 support community, Our team is trying to integrate DRAMsim3 with the latest version of Gem5 (https://github.com/gem5/gem5<https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_gem5_gem5&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=t_EfxZZf5_p7aa-3fmQ3iw&m=w31pbsf0NjSusmMymlxhhQdQQBIKO_S6WI9SjJkacfs&s=4UBINNCsoRmcaCegPeCwce2iMfdxMXekEmem3pM1QIA&e=>). We were able to successfully build Gem5 with DRAMsim3 by following the steps in the README file under ext/dramsim3, but on executing any test script (such as se.py or low_power_sweep.py) with the option --mem-type=DRAMsim3, we get the following error - Traceback (most recent call last): File "<string>", line 1, in <module> File "build/ARM/python/m5/main.py", line 457, in main exec(filecode, scope) File "configs/example/se.py", line 275, in <module> MemConfig.config_mem(options, system) File "/home/UFAD/ipshita.aggarwal/packages/gem5/configs/common/MemConfig.py", line 257, in config_mem mem_ctrl.dram = dram_intf File "build/ARM/python/m5/SimObject.py", line 1337, in __setattr__ hr_value = value File "build/ARM/python/m5/params.py", line 215, in convert if isNullPointer(value) and isSimObjectClass(self.ptype): TypeError: __init__() takes 1 positional argument but 2 were given Error setting param MemCtrl.dram to <orphan DRAMsim3> Could you point us to any resources or provide directions on how the DRAMsim3 memory option can be used with the latest version of Gem5 such that any ini file configured in src/mem/DRAMsim3.py is picked when the option --mem-type=DRAMsim3 is used. Thanks and Regards, Monica Bhargavi Kodali. Aravind Neelakantan. Ipshita Aggarwal. _______________________________________________ gem5-users mailing list -- gem5-users(a)gem5.org<mailto:gem5-users(a)gem5.org> To unsubscribe send an email to gem5-users-leave(a)gem5.org<mailto:gem5-users-leave(a)gem5.org> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s -- Mahyar Samani (he/him/his) Electrical and Computer Engineering Department Research Assistant at DArchR<https://urldefense.proofpoint.com/v2/url?u=https-3A__arch.cs.ucdavis.edu_&d=DwMFaQ&c=sJ6xIWYx-zLMB3EPkvcnVg&r=t_EfxZZf5_p7aa-3fmQ3iw&m=w31pbsf0NjSusmMymlxhhQdQQBIKO_S6WI9SjJkacfs&s=dcYvIoHuyyE_Uq5NW8Ge8W34Z1sUTehXLbe2jq0_8ls&e=> (2235 Kemper Hall) Secretary ECE-GSA Vice President Iranian Student Association at UC Davis University of California, Davis

gem5-users@gem5.org

ISSUES FACING WHILE INTEGRATING GEM5 AND DRAMSIM3